08_VHDL_simulation2
所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:674KB
下载次数:213
上传日期:2008-03-28 17:14:16
上 传 者:
willmove
说明: 台湾人梁奕智写的VHDL编程学习的PPT讲义,里面包括内容有D触发器、寄存器、累加器、计数器、有限状态机等非常有用的内容。
(Taiwanese Liang-chi written in VHDL programming learning PPT lectures, which include the contents of D flip-flops, registers, accumulators, counters, finite state machine such as a very useful content.)
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08_VHDL_simulation2.pdf (1833685, 2008-03-28)
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