lab2
所属分类：VHDL/FPGA/Verilog
开发工具：Others
文件大小：150KB
下载次数：53
上传日期：2008-06-09 16:58:47
上 传 者：
dianluyuanli
说明： 这是基于verilog语言写的，是基于fpga的数字锁相环的设计，用modelsim打开
(This is based on the Verilog language, and is based on the FPGA of the digital phase-locked loop design, using ModelSim to open)
文件列表:
code\1.txt (7087, 2007-03-16)
code\2.txt (2484, 2007-03-16)
code\DPLL.txt (482, 2007-03-23)
code\DPLL.v (443, 2007-03-23)
code\DPLL.v.bak (453, 2007-03-23)
code\dpll_2kcount.acf (15859, 2007-03-16)
code\dpll_2kcount.hif (1598, 2007-03-16)
code\dpll_2kcount.mmf (1252, 2007-03-16)
code\DPLL_2KCOUNT.txt (1194, 2007-03-16)
code\DPLL_2KCOUNT.v (1092, 2007-03-23)
code\DPLL_2KCOUNT.v.bak (1094, 2007-03-23)
code\dpll_2kcount_tp.acf (14900, 2007-03-15)
code\dpll_2kcount_tp.hif (1534, 2007-03-15)
code\DPLL_2KCOUNT_tp.txt (522, 2007-03-16)
code\DPLL_2KCOUNT_tp.v (496, 2007-03-23)
code\DPLL_2KCOUNT_tp.v.bak (477, 2007-03-23)
code\DPLL_3count.txt (735, 2007-03-16)
code\DPLL_3count.v (711, 2007-03-17)
code\DPLL_3count.v.bak (711, 2007-03-17)
code\DPLL_3count_tp.txt (501, 2007-03-16)
code\DPLL_3count_tp.v (486, 2007-03-16)
code\DPLL_3count_tp.v.bak (498, 2007-03-16)
code\DPLL_4count.txt (319, 2007-03-15)
code\DPLL_4count.v (509, 2007-03-23)
code\DPLL_4count.v.bak (505, 2007-03-22)
code\DPLL_4count_tp.txt (327, 2007-03-22)
code\DPLL_4count_tp.v (372, 2007-03-23)
code\DPLL_4count_tp.v.bak (371, 2007-03-23)
code\DPLL_H.txt (505, 2007-03-22)
code\DPLL_H.v (482, 2007-03-22)
code\DPLL_H.v.bak (471, 2007-03-22)
code\DPLL_H_tp.txt (390, 2007-03-22)
code\DPLL_H_tp.v (370, 2007-03-22)
code\DPLL_H_tp.v.bak (390, 2007-03-22)
code\DPLL_tp.txt (518, 2007-03-23)
code\DPLL_tp.v (432, 2018-03-28)
code\DPLL_tp.v.bak (432, 2018-03-28)
code\DPLL_two.txt (496, 2007-03-22)
code\DPLL_two.v (484, 2007-03-22)
code\DPLL_two.v.bak (472, 2007-03-22)
... ...
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