S7_UART
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：1516KB
下载次数：19
上传日期：2008-06-25 21:38:06
上 传 者：
zhmotion
说明： S7_UART串口输出，运行在quartus50中
(S7_UART serial output, running on quartus50 in)
文件列表:
S7_UART (0, 2007-02-09)
S7_UART\Doc (0, 2008-06-10)
S7_UART\Doc\sscom.ini (1045, 2007-02-09)
S7_UART\Doc\sscom32.exe (789504, 2003-11-24)
S7_UART\Doc\UART控制器设计说明.doc (77824, 2006-06-06)
S7_UART\Doc\xapp341.pdf (27983, 2004-07-28)
S7_UART\func_sim (0, 2007-02-09)
S7_UART\func_sim\rcvr.v (2244, 2004-11-03)
S7_UART\func_sim\transcript (26003, 2005-12-17)
S7_UART\func_sim\txmit.v (2193, 2004-11-03)
S7_UART\func_sim\txmit_tf.do (929, 2004-08-10)
S7_UART\func_sim\uart.cr.mti (1205, 2005-12-17)
S7_UART\func_sim\uart.mpf (18569, 2005-12-17)
S7_UART\func_sim\uart.v (769, 2004-11-03)
S7_UART\func_sim\uart_if.v (2240, 2004-11-03)
S7_UART\func_sim\uart_tb.do (1479, 2004-08-12)
S7_UART\func_sim\uart_tb.v (1302, 2004-11-03)
S7_UART\func_sim\uart_tb_fixed.do (1481, 2004-08-12)
S7_UART\func_sim\vish_stacktrace.vstf (6871, 2005-12-17)
S7_UART\func_sim\vsim.wlf (32768, 2005-12-17)
S7_UART\func_sim\wave.do (1204, 2005-12-17)
S7_UART\func_sim\work (0, 2007-02-09)
S7_UART\func_sim\work\@u@a@r@t_tb (0, 2007-02-09)
S7_UART\func_sim\work\@u@a@r@t_tb\verilog.asm (10164, 2005-12-17)
S7_UART\func_sim\work\@u@a@r@t_tb\_primary.dat (1146, 2005-12-17)
S7_UART\func_sim\work\@u@a@r@t_tb\_primary.vhd (74, 2005-12-17)
S7_UART\func_sim\work\rcvr (0, 2007-02-09)
S7_UART\func_sim\work\rcvr\verilog.asm (13133, 2005-12-17)
S7_UART\func_sim\work\rcvr\_primary.dat (1907, 2005-12-17)
S7_UART\func_sim\work\rcvr\_primary.vhd (447, 2005-12-17)
S7_UART\func_sim\work\txmit (0, 2007-02-09)
S7_UART\func_sim\work\txmit\verilog.asm (12244, 2005-12-17)
S7_UART\func_sim\work\txmit\_primary.dat (1988, 2005-12-17)
S7_UART\func_sim\work\txmit\_primary.vhd (406, 2005-12-17)
S7_UART\func_sim\work\uart (0, 2007-02-09)
S7_UART\func_sim\work\uart\verilog.asm (5297, 2005-12-17)
S7_UART\func_sim\work\uart\_primary.dat (527, 2005-12-17)
S7_UART\func_sim\work\uart\_primary.vhd (681, 2005-12-17)
S7_UART\func_sim\work\uart_if (0, 2007-02-09)
S7_UART\func_sim\work\uart_if\verilog.asm (13005, 2005-12-17)
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