dds
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：2788KB
下载次数：100
上传日期：2008-08-13 23:15:31
上 传 者：
1038544
说明： 实现dds功能，利用quartus软件，
子模块包括加法器，锁相环，date-rom
利用原图将各模块综合，利用ps2键盘控制频率及相位。
(Dds realize functions, using Quartus software, sub-modules including the adder, phase-locked loop, date-rom image to the module using integrated, using ps2 keyboard to control the frequency and phase.)
文件列表:
dds\add.vhd (303, 2008-06-04)
dds\add.vhd.bak (304, 2008-06-04)
dds\add10.vhd (300, 2008-06-04)
dds\adder10b.bsf (1786, 2008-06-04)
dds\adder32b.bsf (1793, 2008-06-04)
dds\date_rom.bsf (2735, 2008-06-04)
dds\date_rom.cmp (968, 2008-06-04)
dds\date_rom.vhd (6221, 2008-06-04)
dds\date_rom_wave0.jpg (105805, 2008-06-04)
dds\date_rom_waveforms.html (1052, 2008-06-04)
dds\db\add_sub_1ph.tdf (7140, 2008-06-04)
dds\db\add_sub_4rh.tdf (2432, 2008-06-04)
dds\db\add_sub_5rh.tdf (2589, 2008-06-04)
dds\db\add_sub_8rh.tdf (3060, 2008-06-04)
dds\db\altsyncram_aa72.tdf (13865, 2008-06-04)
dds\db\altsyncram_qvo3.tdf (22302, 2008-06-10)
dds\db\altsyncram_sso3.tdf (13597, 2008-06-10)
dds\db\altsyncram_tr51.tdf (2814, 2008-06-04)
dds\db\cntr_92i.tdf (3044, 2008-06-10)
dds\db\cntr_cmi.tdf (3476, 2008-06-10)
dds\db\cntr_isi.tdf (4651, 2008-06-10)
dds\db\cntr_m3i.tdf (4401, 2008-06-10)
dds\db\cntr_p3i.tdf (3275, 2008-06-10)
dds\db\dds.(0).cnf.cdb (3505, 2008-06-10)
dds\db\dds.(0).cnf.hdb (1407, 2008-06-10)
dds\db\dds.(1).cnf.cdb (1390, 2008-06-04)
dds\db\dds.(1).cnf.hdb (600, 2008-06-04)
dds\db\dds.(10).cnf.cdb (1586, 2008-06-04)
dds\db\dds.(10).cnf.hdb (759, 2008-06-04)
dds\db\dds.(100).cnf.cdb (1590, 2008-06-18)
dds\db\dds.(100).cnf.hdb (619, 2008-06-18)
dds\db\dds.(101).cnf.cdb (2276, 2008-06-18)
dds\db\dds.(101).cnf.hdb (1012, 2008-06-18)
dds\db\dds.(102).cnf.cdb (5470, 2008-06-18)
dds\db\dds.(102).cnf.hdb (776, 2008-06-18)
dds\db\dds.(103).cnf.cdb (2936, 2008-06-18)
dds\db\dds.(103).cnf.hdb (1387, 2008-06-18)
dds\db\dds.(104).cnf.cdb (1347, 2008-06-18)
dds\db\dds.(104).cnf.hdb (528, 2008-06-18)
dds\db\dds.(105).cnf.cdb (910, 2008-06-18)
... ...
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