说明：  一种基于FPGA 实现的全并行结构FFT 设计方法，采用全并行加流水结构, 可在一个时钟节拍内完成32 点FFT 运算的功能, 设计最高运算速度可达11ns
(FPGA-based parallel architecture to achieve the full FFT design methodology, the use of the entire parallel increase in water structure, in a beat the clock to complete 32-point FFT computation function, the design maximum speed of up to 11ns)