counter_clk
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：1906KB
下载次数：13
上传日期：2008-08-28 10:33:11
上 传 者：
kellylxy
说明： no intro
(Is the VHDL language, in the FPGA development board realize decimal technology (7 digital tube display), including reset, cleared, counting enable.)
文件列表:
counter_clk (0, 2008-06-30)
counter_clk\led.qpf (903, 2008-06-26)
counter_clk\led.qsf (9959, 2008-07-31)
counter_clk\led.bdf (7625, 2008-07-01)
counter_clk\led.flow.rpt (10342, 2008-07-02)
counter_clk\led.fit.rpt (260907, 2008-07-02)
counter_clk\led.qws (575, 2008-07-31)
counter_clk\Vhdl1.vhd.bak (788, 2008-06-26)
counter_clk\led.map.summary (462, 2008-07-02)
counter_clk\led.asm.rpt (7792, 2008-07-02)
counter_clk\led.tan.rpt (391445, 2008-07-02)
counter_clk\led.sim.rpt (1521199, 2008-07-31)
counter_clk\led.map.rpt (143239, 2008-07-02)
counter_clk\div.bsf (1585, 2008-07-01)
counter_clk\DIV.vwf (1230, 2008-07-02)
counter_clk\test_stp.vhd (6303, 2008-07-02)
counter_clk\test_stp.cmp (985, 2008-07-02)
counter_clk\deccount.vhd (1098, 2006-06-25)
counter_clk\count.vhd.bak (787, 2008-06-26)
counter_clk\count.vhd (787, 2008-06-30)
counter_clk\led.pin (79186, 2008-07-02)
counter_clk\led.fit.smsg (513, 2008-07-02)
counter_clk\led.fit.summary (604, 2008-07-02)
counter_clk\led.sof (841144, 2008-07-02)
counter_clk\led.pof (2097354, 2008-07-02)
counter_clk\led.tan.summary (2875, 2008-07-02)
counter_clk\led.done (26, 2008-07-31)
counter_clk\trans.bsf (2108, 2008-06-26)
counter_clk\count.bsf (2122, 2008-06-30)
counter_clk\led.vwf (6922, 2008-07-02)
counter_clk\trans.vhd.bak (846, 2008-06-26)
counter_clk\trans.vhd (846, 2008-06-26)
counter_clk\led.dpf (239, 2008-06-30)
counter_clk\led.cdf (334, 2008-07-01)
counter_clk\div (0, 2008-06-30)
counter_clk\div\div.qpf (903, 2008-06-26)
counter_clk\div\div.qsf (2114, 2008-06-26)
counter_clk\div\div.vhd (565, 2008-06-26)
counter_clk\div\div.map.summary (452, 2008-06-26)
counter_clk\div\div.map.rpt (16906, 2008-06-26)
... ...
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