xapp208

所属分类:图形图象
开发工具:VHDL
文件大小:8KB
下载次数:49
上传日期:2008-09-05 18:59:20
上 传 者chxleefd
说明:  xilinx 基于查找表方法实现的IDCT的verilog源码
(Xilinx LUT-based method to achieve the IDCT of the Verilog source code)

文件列表:
big_lut.v (11493, 1999-08-31)
byte_mult.v (7739, 1999-08-31)
idct.v (10108, 1999-08-31)
testbench.v (3787, 1999-08-31)

Date: Wed. Jun 9, 1999 File Name: Description: Contains the following files readme.txt big_lut.v byte_mult.v idct.v testbench.v Platform: All Synthesis Tools: Use Synplicity or Leonardo (Exemplar). Known Issues: Will not compile with FPGA Express. Installation/Use: Use 'unzip' on the .zip file and 'gunzip' followed by 'tar -xvf' on the .tar.gz file. Who to Contact if you have problems? kamal.chaudhary@xilinx.com North American Support (Mon,Tues,Wed,Fri 6:30am-5pm Thr 6:30am - 4:00pm Pacific Standard Time) Hotline: 1-800-255-7778 or (408) 879-5199 Fax: (408) 879-4442 Email: hotline@xilinx.com United Kingdom Support (Mon,Tues,Wed,Thr 9:00am-12:00pm, 1:00-5:30pm Fri 9:00am-12:00pm, 1:00-3:30pm) Hotline: +44 1932 820821 Fax: +44 1932 828522 Email : ukhelp@xilinx.com France Support (Mon,Tues,Wed,Thr,Fri 9:30am-12:30pm, 2:00-5:30pm) Hotline: +33 1 3463 0100 Fax: +33 1 3463 0959 Email : frhelp@xilinx.com Germany Support (Mon,Tues,Wed,Thr 8:00am-12:00pm, 1:00-5:00pm, Fri 8:00am-12:00pm, 1:00pm-3:00pm) Hotline: +49 89 991 54930 Fax: +49 89 904 4748 Email : dlhelp@xilinx.com Japan Support (Mon,Tues,Thu,Fri 9:00am -5:00pm () Wed 9:00am -4:00pm) Hotline: (81)3-3297-9163 Fax:: (81)3-3297-0067 Email: jhotline@xilinx.com

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