xapp371

所属分类:数学计算
开发工具:VHDL
文件大小:85KB
下载次数:91
上传日期:2008-09-09 08:45:40
上 传 者wwk24k2
说明:  xilinx里的乘法器ip核程序,booth乘法 wallace tree算法 4-2压缩编码 超前进位加法
(Xilinx multiplier ip)

文件列表:
GF (0, 2003-11-14)
GF\ISE61_Project_File (0, 2003-11-14)
GF\ISE61_Project_File\.untf (0, 2003-11-14)
GF\ISE61_Project_File\automake.log (0, 2003-11-14)
GF\ISE61_Project_File\GF.dhp (6212, 2003-11-14)
GF\ISE61_Project_File\GF.npl (622, 2003-11-14)
GF\ISE61_Project_File\gf_n.bld (536, 2003-11-14)
GF\ISE61_Project_File\gf_n.cmd_log (449, 2003-11-14)
GF\ISE61_Project_File\gf_n.cxt (29206, 2003-11-14)
GF\ISE61_Project_File\gf_n.data (1522, 2003-11-14)
GF\ISE61_Project_File\gf_n.gyd (784, 2003-11-14)
GF\ISE61_Project_File\gf_n.log (28, 2003-11-14)
GF\ISE61_Project_File\gf_n.lso (6, 2003-11-14)
GF\ISE61_Project_File\gf_n.mfd (9620, 2003-11-14)
GF\ISE61_Project_File\gf_n.mod (764, 2003-11-14)
GF\ISE61_Project_File\gf_n.ngc (16101, 2003-11-14)
GF\ISE61_Project_File\gf_n.ngd (32395, 2003-11-14)
GF\ISE61_Project_File\gf_n.ngr (21263, 2003-11-14)
GF\ISE61_Project_File\gf_n.pnx (1468, 2003-11-14)
GF\ISE61_Project_File\gf_n.prj (98, 2003-11-14)
GF\ISE61_Project_File\gf_n.rpt (22078, 2003-11-14)
GF\ISE61_Project_File\gf_n.stx (0, 2003-11-14)
GF\ISE61_Project_File\gf_n.syr (6951, 2003-11-14)
GF\ISE61_Project_File\gf_n.tim (13151, 2003-11-14)
GF\ISE61_Project_File\GF_N.vhd (3492, 2003-07-02)
GF\ISE61_Project_File\gf_n.vm6 (71907, 2003-11-14)
GF\ISE61_Project_File\gf_n.xml (19504, 2003-11-14)
GF\ISE61_Project_File\gf_n_build.xml (6555, 2003-11-14)
GF\ISE61_Project_File\gf_n_html (0, 2003-11-14)
GF\ISE61_Project_File\gf_n_html\tim (0, 2003-11-14)
GF\ISE61_Project_File\gf_n_html\tim\timing_report.htm (19228, 2003-11-14)
GF\ISE61_Project_File\gf_n_pad.csv (2442, 2003-11-14)
GF\ISE61_Project_File\GF_N_pkg.vhd (1124, 2003-08-05)
GF\ISE61_Project_File\GF_N_TB.vhd (3581, 2003-04-18)
GF\ISE61_Project_File\multiplier_cell.vhd (1196, 2003-07-02)
GF\ISE61_Project_File\shift_N.vhd (1101, 2003-07-02)
GF\ISE61_Project_File\shift_N_Parallel_Load.vhd (1369, 2003-07-02)
GF\ISE61_Project_File\tmperr.err (0, 2003-11-14)
GF\ISE61_Project_File\xst (0, 2003-11-14)
GF\ISE61_Project_File\xst\work (0, 2003-11-14)
... ...

This zip file contains the VHDL code which implements the Galois Field Multiplier as described in XAPP371. There are two directories in this zip file: 1) ISE61_Project_File -- This directory contains the ISE 6.1 project used to implement the design. All VHDL files (including test bench) have been imported, and the project has been implemented. 2) VHDL_Source -- This directory contains only the VHDL files necessary for the project The following is a description of the VHDL Source files: ****************************************************************************************************** GF_N_pkg.vhd -- This package contains the global variables to be used by the GF project This is where you define: K = Galoi Field Size (i.e. 4, 8, 16, etc) P = The corresponding Irreducable Polynomial to be used with K A = Multiplier (size of multiplier should correspond with size of K) B = Multiplicand (size of multiplicand should correspond with size of K) ****************************************************************************************************** ****************************************************************************************************** GF_N.vhd -- Upper level GF design file which instantiates 'multiplier_cell.vhd' and 'shift_N.vhd' ****************************************************************************************************** ****************************************************************************************************** multiplier_cell.vhd -- Instantiated by GF_N. This implements a single multiplier cell ****************************************************************************************************** ****************************************************************************************************** shift_N.vhd -- Instantiated by GF_N also. Implements a shift register as required by the Galoi Field schematic. ****************************************************************************************************** ****************************************************************************************************** shift_n_parallel_load.vhd -- An 'N' sized shift register with parallel load. This module is used to test the design. The multiplier value is shifted in serially through this shift register module, then the multiplier is loaded into the GF_N block ****************************************************************************************************** ****************************************************************************************************** GF_N_TB.vhd -- Is a Test Bench for the GF project. This Test Bench actually is for the shift_n_parallel load block, as it serially shifts in data to the shift register, and controls when the multiplier value is loaded ****************************************************************************************************** into the GF_N block

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