seg73
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：197KB
下载次数：113
上传日期：2008-09-22 23:13:27
上 传 者：
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说明： 递增方式在4位数码管上向上计数显示从0000-0001->0002……..9999….0000….0001….
-- 利用CPLD设计了一个4位十进制计数器，并用数码管显示当前计数值
(Incremental approach in the four counts upward digital tube display from 0000-0001-)
文件列表:
seg73\cmp_state.ini (3, 2006-02-11)
seg73\db\seg73.(0).cnf.cdb (5454, 2008-07-11)
seg73\db\seg73.(0).cnf.hdb (1362, 2008-07-11)
seg73\db\seg73.asm.qmsg (1418, 2008-07-11)
seg73\db\seg73.cbx.xml (87, 2008-07-11)
seg73\db\seg73.cmp.cdb (18149, 2008-07-11)
seg73\db\seg73.cmp.hdb (7926, 2008-07-11)
seg73\db\seg73.cmp.qrpt (0, 2008-07-11)
seg73\db\seg73.cmp.rdb (18791, 2008-07-11)
seg73\db\seg73.cmp.tdb (16314, 2008-07-11)
seg73\db\seg73.cmp0.ddb (28685, 2008-07-11)
seg73\db\seg73.dbp (0, 2008-07-11)
seg73\db\seg73.db_info (136, 2008-07-09)
seg73\db\seg73.eco.cdb (141, 2008-07-11)
seg73\db\seg73.fit.qmsg (14988, 2008-07-11)
seg73\db\seg73.hier_info (2424, 2008-07-11)
seg73\db\seg73.hif (506, 2008-07-11)
seg73\db\seg73.map.cdb (5918, 2008-07-11)
seg73\db\seg73.map.hdb (7382, 2008-07-11)
seg73\db\seg73.map.qmsg (3978, 2008-07-11)
seg73\db\seg73.pre_map.cdb (4346, 2008-07-11)
seg73\db\seg73.pre_map.hdb (7126, 2008-07-11)
seg73\db\seg73.psp (0, 2008-07-11)
seg73\db\seg73.rtlv.hdb (7111, 2008-07-11)
seg73\db\seg73.rtlv_sg.cdb (4292, 2008-07-11)
seg73\db\seg73.rtlv_sg_swap.cdb (158, 2008-07-11)
seg73\db\seg73.sgdiff.cdb (5896, 2008-07-11)
seg73\db\seg73.sgdiff.hdb (7258, 2008-07-11)
seg73\db\seg73.signalprobe.cdb (365, 2008-07-11)
seg73\db\seg73.sld_design_entry.sci (134, 2008-07-11)
seg73\db\seg73.sld_design_entry_dsc.sci (134, 2008-07-11)
seg73\db\seg73.syn_hier_info (0, 2008-07-11)
seg73\db\seg73.tan.qmsg (30296, 2008-07-11)
seg73\db (0, 2008-07-11)
seg73\seg73.asm.rpt (7109, 2008-07-11)
seg73\seg73.done (26, 2008-07-11)
seg73\seg73.fit.eqn (25174, 2008-07-11)
seg73\seg73.fit.rpt (69439, 2008-07-11)
seg73\seg73.fit.summary (402, 2008-07-11)
seg73\seg73.flow.rpt (3583, 2008-07-11)
... ...
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