Verilog_Example
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：1828KB
下载次数：6
上传日期：2008-10-10 08:56:12
上 传 者：
honly
说明： 设计与验证Verilog_实例，经典的HDl书籍，强烈推荐
(Design and verification Verilog_ examples Hdl classic books, strongly recommend)
文件列表:
Example-2-1 (0, 2006-10-16)
Example-2-1\HelloVlog.v (1661, 2005-09-04)
Example-3-1 (0, 2006-10-16)
Example-3-1\FullAdd.v (675, 2006-02-27)
Example-3-1\transcript (151, 2006-02-27)
Example-3-2 (0, 2006-10-16)
Example-3-2\FullAdd.v (824, 2006-02-27)
Example-3-3 (0, 2006-10-16)
Example-3-3\CRC10.v (1073, 2006-01-22)
Example-4-1 (0, 2006-10-16)
Example-4-1\cnt.prd (264, 2006-03-08)
Example-4-1\cnt.prj (1196, 2006-03-08)
Example-4-1\rev_1 (0, 2006-10-16)
Example-4-1\rev_1\cnt1.edf (7186, 2006-03-08)
Example-4-1\rev_1\cnt1.fse (0, 2006-03-08)
Example-4-1\rev_1\cnt1.srm (3552, 2006-03-08)
Example-4-1\rev_1\cnt1.srr (1313, 2006-03-08)
Example-4-1\rev_1\cnt1.srs (1093, 2006-03-08)
Example-4-1\rev_1\cnt1.tlg (108, 2006-03-08)
Example-4-1\rev_1\cnt2.edf (6856, 2006-03-08)
Example-4-1\rev_1\cnt2.fse (0, 2006-03-08)
Example-4-1\rev_1\cnt2.srm (2417, 2006-03-08)
Example-4-1\rev_1\cnt2.srr (1184, 2006-03-08)
Example-4-1\rev_1\cnt2.srs (975, 2006-03-08)
Example-4-1\rev_1\cnt2.tlg (108, 2006-03-08)
Example-4-1\rev_1\cnt3.edf (6855, 2006-03-08)
Example-4-1\rev_1\cnt3.fse (0, 2006-03-08)
Example-4-1\rev_1\cnt3.srm (2417, 2006-03-08)
Example-4-1\rev_1\cnt3.srr (1184, 2006-03-08)
Example-4-1\rev_1\cnt3.srs (975, 2006-03-08)
Example-4-1\rev_1\cnt3.tlg (108, 2006-03-08)
Example-4-1\rev_1\par_1 (0, 2006-10-16)
Example-4-1\rev_1\syntmp (0, 2006-10-16)
Example-4-1\rev_1\syntmp\cnt1.plg (0, 2006-03-08)
Example-4-1\rev_1\syntmp\cnt2.msg (0, 2006-03-08)
Example-4-1\rev_1\syntmp\cnt2.plg (0, 2006-03-08)
Example-4-1\rev_1\syntmp\cnt3.msg (231, 2006-03-08)
Example-4-1\rev_1\syntmp\cnt3.plg (0, 2006-03-08)
Example-4-1\source (0, 2006-10-16)
Example-4-1\source\cnt1.v (174, 2006-03-06)
... ...
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