Huffman
所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:1532KB
下载次数:58
上传日期:2008-10-25 01:27:05
上 传 者:
vanki3000
说明: 用于视频运动图像编码的HUFFMAN编码,可广泛运用于MPEG
(Moving Picture for video coding Huffman coding, can be widely applied to MPEG)
文件列表:
Huffman\xapp616.zip (13141, 2005-12-26)
Huffman\_desktop.ini (9, 2006-09-14)
Huffman\xapp616\huffman_en_full.v (40789, 2003-01-27)
Huffman\xapp616\huffman_en_full.vhd (68475, 2003-03-06)
Huffman\xapp616\transcript (390, 2008-02-16)
Huffman\xapp616\_desktop.ini (9, 2006-09-14)
Huffman\Huffman编码\08Col_Huffman.pdf (525223, 2001-03-13)
Huffman\Huffman编码\h.rar (292500, 2002-12-20)
Huffman\Huffman编码\homework.rar (8358, 2002-12-10)
Huffman\Huffman编码\Huffman 编码器设计说明.doc (110592, 2002-02-04)
Huffman\Huffman编码\Huffman 编码器设计说明.pdf (70230, 2002-02-04)
Huffman\Huffman编码\huffman.c (7657, 1999-08-30)
Huffman\Huffman编码\huffman.dsp (3411, 2002-01-30)
Huffman\Huffman编码\huffman.plg (792, 2002-01-30)
Huffman\Huffman编码\r.rar (269400, 2002-12-20)
Huffman\Huffman编码\_desktop.ini (9, 2006-09-14)
Huffman\Huffman编码\r\dcr.jpg (47821, 2002-12-19)
Huffman\Huffman编码\r\hresult.jpg (174385, 2002-12-19)
Huffman\Huffman编码\r\s16r.jpg (83150, 2002-12-19)
Huffman\Huffman编码\r\s8r.jpg (72721, 2002-12-19)
Huffman\Huffman编码\r\sin.jpg (58928, 2002-12-19)
Huffman\Huffman编码\r\stater.jpg (122561, 2002-12-19)
Huffman\Huffman编码\r\Thumbs.db (13824, 2006-06-22)
Huffman\Huffman编码\r\_desktop.ini (9, 2006-09-14)
Huffman\Huffman编码\homework\alu.vhd (588, 2002-12-10)
Huffman\Huffman编码\homework\alutest.vhd (1356, 2002-12-10)
Huffman\Huffman编码\homework\counter12.vhd (775, 2002-12-10)
Huffman\Huffman编码\homework\counter12test.vhd (842, 2002-12-10)
Huffman\Huffman编码\homework\decoder.vhd (513, 2002-12-10)
Huffman\Huffman编码\homework\dff.vhd (413, 2002-12-10)
Huffman\Huffman编码\homework\dfftest.vhd (860, 2002-12-10)
Huffman\Huffman编码\homework\frame.vhd (1346, 2002-12-10)
Huffman\Huffman编码\homework\frq.vhd (688, 2002-12-10)
Huffman\Huffman编码\homework\frqtest.vhd (622, 2002-12-10)
Huffman\Huffman编码\homework\function.vhd (935, 2002-12-10)
Huffman\Huffman编码\homework\keytest.vhd (673, 2002-12-10)
Huffman\Huffman编码\homework\keytestbench.vhd (1052, 2002-12-10)
Huffman\Huffman编码\homework\random.vhd (600, 2002-12-10)
Huffman\Huffman编码\homework\randomtest.vhd (575, 2002-12-10)
... ...
**********************************************************************
** Disclaimer: LIMITED WARRANTY AND DISCLAMER. These designs are
** provided to you "as is". Xilinx and its licensors make and you
** receive no warranties or conditions, express, implied,
** statutory or otherwise, and Xilinx specifically disclaims any
** implied warranties of merchantability, non-infringement,or
** fitness for a particular purpose. Xilinx does not warrant that
** the functions contained in these designs will meet your
** requirements, or that the operation of these designs will be
** uninterrupted or error free, or that defects in the Designs
** will be corrected. Furthermore, Xilinx does not warrantor
** make any representations regarding use or the results of the
** use of the designs in terms of correctness, accuracy,
** reliability, or otherwise.
**
** LIMITATION OF LIABILITY. In no event will Xilinx or its
** licensors be liable for any loss of data, lost profits,cost
** or procurement of substitute goods or services, or for any
** special, incidental, consequential, or indirect damages
** arising from the use or operation of the designs or
** accompanying documentation, however caused and on any theory
** of liability. This limitation will apply even if Xilinx
** has been advised of the possibility of such damage. This
** limitation shall apply not-withstanding the failure of the
** essential purpose of any limited remedies herein.
**
** Copyright (c) 2003 Xilinx, Inc.
** All rights reserved
**
******************************************************************************
XAPP616.zip file contains
The word document
Verilog files (*.v)
huffman_en_full.v
Vhdl file (*.vhd)
huffman_en_full.vhd
The Verilog and VHDL synthesized and places and routed using Foundation 5.1.03i.
Synplify ProVerilog was used for synthesis.
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