CPLDVHDLCODE
所属分类：VHDL/FPGA/Verilog
开发工具：Others
文件大小：4534KB
下载次数：3
上传日期：2008-11-05 12:03:59
上 传 者：
eesady
说明： CPLD VHDL CODE非常好的参考资料
(CPLD VHDL CODE a very good reference)
文件列表:
VHDL_Development_Board_Sources\Mars-7128-S CPLD开发板用户手册.pdf (375935, 2006-01-06)
VHDL_Development_Board_Sources\使用说明请参看右侧注释====〉〉.txt (774, 2008-01-28)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\cmp_state.ini (2, 2005-12-13)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.(0).cnf.cdb (1865, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.(0).cnf.hdb (688, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.asm.qmsg (1114, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.cbx.xml (88, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.cmp.cdb (3479, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.cmp.hdb (6111, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.cmp.rdb (8250, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.cmp.tdb (2061, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.cmp0.ddb (3049, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.db_info (136, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.eco.cdb (141, 2005-12-13)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.fit.qmsg (1236, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.hier_info (1046, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.hif (430, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.map.cdb (1707, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.map.hdb (5888, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.map.qmsg (4010, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.pre_map.cdb (1638, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.pre_map.hdb (6224, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.psp (0, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.rtlv.hdb (6223, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.rtlv_sg.cdb (1595, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.rtlv_sg_swap.cdb (158, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.sgdiff.cdb (1908, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.sgdiff.hdb (6228, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.sld_design_entry.sci (135, 2005-12-13)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.sld_design_entry_dsc.sci (135, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.syn_hier_info (0, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode.tan.qmsg (3695, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\db\encode_cmp.qrpt (0, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\encode.asm.rpt (5813, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\encode.done (26, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\encode.fit.eqn (5115, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\encode.fit.rpt (28724, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\encode.fit.summary (340, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\encode.flow.rpt (3393, 2005-09-23)
VHDL_Development_Board_Sources\基础实验\8位优先编码器\encode.map.eqn (4731, 2005-09-23)
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