VHDL_Development_Board_Sources
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：4599KB
下载次数：58
上传日期：2008-12-14 14:43:01
上 传 者：
独孤八剑
说明： CPLD开发板VHDL源程序并附上开发板的原理图
(CPLD development board VHDL source code along with the development board schematics)
文件列表:
VHDL_Development_Board_Sources\Mars-7128-S CPLD开发板用户手册.pdf (375935, 2006-01-06)
VHDL_Development_Board_Sources\使用说明请参看右侧注释====〉〉.txt (774, 2008-01-28)
VHDL_Development_Board_Sources\综合实验\数字时钟\clock.asm.rpt (6864, 2006-10-23)
VHDL_Development_Board_Sources\综合实验\数字时钟\clock.bdf (13661, 2005-12-09)
VHDL_Development_Board_Sources\综合实验\数字时钟\clock.cdf (285, 2006-07-03)
VHDL_Development_Board_Sources\综合实验\数字时钟\clock.done (26, 2006-10-23)
VHDL_Development_Board_Sources\综合实验\数字时钟\clock.fit.eqn (49264, 2006-10-23)
VHDL_Development_Board_Sources\综合实验\数字时钟\clock.fit.rpt (282689, 2006-10-23)
VHDL_Development_Board_Sources\综合实验\数字时钟\clock.fit.summary (339, 2006-10-23)
VHDL_Development_Board_Sources\综合实验\数字时钟\clock.flow.rpt (3384, 2006-10-23)
VHDL_Development_Board_Sources\综合实验\数字时钟\clock.map.eqn (48247, 2006-10-23)
VHDL_Development_Board_Sources\综合实验\数字时钟\clock.map.rpt (24561, 2006-10-23)
VHDL_Development_Board_Sources\综合实验\数字时钟\clock.map.summary (310, 2006-10-23)
VHDL_Development_Board_Sources\综合实验\数字时钟\clock.pin (12795, 2006-10-23)
VHDL_Development_Board_Sources\综合实验\数字时钟\clock.pof (7998, 2006-10-23)
VHDL_Development_Board_Sources\综合实验\数字时钟\clock.qpf (1567, 2005-11-01)
VHDL_Development_Board_Sources\综合实验\数字时钟\clock.qsf (3112, 2005-12-09)
VHDL_Development_Board_Sources\综合实验\数字时钟\clock.qws (1552, 2006-10-23)
VHDL_Development_Board_Sources\综合实验\数字时钟\clock.tan.rpt (71134, 2006-10-23)
VHDL_Development_Board_Sources\综合实验\数字时钟\clock.tan.summary (1448, 2006-10-23)
VHDL_Development_Board_Sources\综合实验\数字时钟\clock_assignment_defaults.qdf (34961, 2005-12-09)
VHDL_Development_Board_Sources\综合实验\数字时钟\cmp_state.ini (2, 2006-10-23)
VHDL_Development_Board_Sources\综合实验\数字时钟\decode47.bsf (1646, 2005-12-09)
VHDL_Development_Board_Sources\综合实验\数字时钟\decode47.vhd (1274, 2005-12-09)
VHDL_Development_Board_Sources\综合实验\数字时钟\fen1.bsf (1791, 2005-12-09)
VHDL_Development_Board_Sources\综合实验\数字时钟\fen1.vhd (948, 2005-12-09)
VHDL_Development_Board_Sources\综合实验\数字时钟\fen100.bsf (1793, 2005-12-09)
VHDL_Development_Board_Sources\综合实验\数字时钟\fen100.vhd (981, 2005-12-09)
VHDL_Development_Board_Sources\综合实验\数字时钟\fen24.bsf (2198, 2005-12-09)
VHDL_Development_Board_Sources\综合实验\数字时钟\fen24.vhd (1360, 2005-12-09)
VHDL_Development_Board_Sources\综合实验\数字时钟\fen60.bsf (2198, 2005-12-09)
VHDL_Development_Board_Sources\综合实验\数字时钟\fen60.vhd (1178, 2005-12-09)
VHDL_Development_Board_Sources\综合实验\数字时钟\lpm_counter0.bsf (1984, 2006-04-04)
VHDL_Development_Board_Sources\综合实验\数字时钟\lpm_counter0.cmp (957, 2006-04-04)
VHDL_Development_Board_Sources\综合实验\数字时钟\lpm_counter0.vhd (4154, 2006-04-04)
VHDL_Development_Board_Sources\综合实验\数字时钟\lpm_counter0_wave0.jpg (50063, 2006-04-04)
VHDL_Development_Board_Sources\综合实验\数字时钟\lpm_counter0_waveforms.html (549, 2006-04-04)
VHDL_Development_Board_Sources\综合实验\数字时钟\sel.bsf (3175, 2005-12-09)
VHDL_Development_Board_Sources\综合实验\数字时钟\sel.vhd (2065, 2005-12-09)
VHDL_Development_Board_Sources\综合实验\数字时钟\serv_req_info.txt (525, 2006-04-04)
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