xapp529_6_1
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：98KB
下载次数：46
上传日期：2008-12-16 10:56:50
上 传 者：
erke1984
说明： 一些有用的IP核，本人也是刚涉及FPGA到开发，特别希望前辈们能够共享一些关于图像处理方面的IP核
(Some useful IP core, and I was just involved in FPGA to development, particularly the older generation to share some information about aspects of image processing IP core)
文件列表:
xapp529 (0, 2003-11-10)
xapp529\bram_init.sh (265, 2003-10-22)
xapp529\code (0, 2003-11-03)
xapp529\code\system.c (2532, 2003-11-03)
xapp529\code\system_modelsim.c (972, 2003-10-22)
xapp529\data (0, 2003-11-03)
xapp529\data\system.ucf (1259, 2003-10-22)
xapp529\etc (0, 2003-11-03)
xapp529\etc\bitgen.ut (343, 2003-09-06)
xapp529\etc\bitgen_spartan3.ut (250, 2003-09-10)
xapp529\etc\download.cmd (185, 2003-09-09)
xapp529\etc\fast_runtime.opt (2671, 2003-09-16)
xapp529\etc\fast_runtime.opt~ (2670, 2003-09-15)
xapp529\etc\xc18v04_vq44.bsd (4669, 2002-09-19)
xapp529\etc\xcr3064xl_vq44.bsd (21917, 2003-04-16)
xapp529\mblaze (0, 2003-11-03)
xapp529\mblaze\code (0, 2003-11-03)
xapp529\mblaze\include (0, 2003-11-03)
xapp529\mblaze\include\mb_interface.h (2698, 2003-10-22)
xapp529\mblaze\include\xbasic_types.h (9375, 2003-10-22)
xapp529\mblaze\include\xenv.h (5067, 2003-10-22)
xapp529\mblaze\include\xenv_none.h (6055, 2003-10-22)
xapp529\mblaze\include\xenv_vxworks.h (6239, 2003-10-22)
xapp529\mblaze\include\xio.h (7868, 2003-10-22)
xapp529\mblaze\include\xparameters.h (708, 2003-10-22)
xapp529\mblaze\include\xstatus.h (19145, 2003-10-22)
xapp529\mblaze\include\xuartlite_l.h (8842, 2003-10-22)
xapp529\mblaze\include\xutil.h (5267, 2003-10-22)
xapp529\mblaze\include\xversion.h (3320, 2003-10-22)
xapp529\mblaze\libsrc (0, 2003-11-03)
xapp529\mblaze\libsrc\bsp (0, 2003-11-03)
xapp529\mblaze\libsrc\bsp\src (0, 2003-11-03)
xapp529\mblaze\libsrc\bsp\src\Makefile (517, 2003-10-22)
xapp529\mblaze\libsrc\bsp\src\mb_interface.h (2698, 2003-10-22)
xapp529\mblaze\libsrc\bsp\src\microblaze_disable_icache.s (1680, 2003-10-22)
xapp529\mblaze\libsrc\bsp\src\microblaze_disable_interrupts.s (1710, 2003-10-22)
xapp529\mblaze\libsrc\bsp\src\microblaze_enable_icache.s (1672, 2003-10-22)
xapp529\mblaze\libsrc\bsp\src\microblaze_enable_interrupts.s (1699, 2003-10-22)
xapp529\mblaze\libsrc\common_v1_00_a (0, 2003-11-03)
xapp529\mblaze\libsrc\common_v1_00_a\src (0, 2003-11-03)
... ...
------------------------------------------------------
NOTE: This reference design has been verified with EDK 6.1
Using this example with software versions other than
the before mentioned may result in inconsistent behavior
and is not supported by Xilinx. Please make sure to use
the described software for proper results.
------------------------------------------------------
Reference design: Connecting a customised user IP on to the MicroBlaze Local Link bus
--------------------------------------------------------------------------------------
This design describes how to connect a customized user IP on the dedicated MicroBlaze
Local Link bus.
System Description
------------------
This system contains a MicroBlaze connected to 2K of BRAM memory over a LMB bus.
A uartlite and a microblaze debug module (opb_mdm) are connected to the OPB bus.
A customized user IP core (Discrete Cosine Transform) is connected to the Microblaze
dedicared Local Link interface. This system is described in the system.mhs file.
The program is running from the internal Block RAM and it writes values to the DCT
core via the Local Link bus. After every 8th word, MicroBlaze reads the result back
from the User IP. The data which are pushed to the core and the result can be seen
in a Hyperterminal. This program is located in code/system.c.
Hyperterminal Settings:
------------------------
Baud Rate : 192000
Data : 8 bit
Parity : none
Stop : 1 bit
Flow control : none
The default system is set to executable mode.
Setup
-----
Board setup - JTAG cable from host computer to the board.
This example uses the Memec Design 2v1000 MicroBlaze demo board Rev. 1
without the P160 communication module. If you have the P160 module
installed remove it and be sure to set JP25 to bypas the P160 module.
Building the System
-------------------
To build the system, enter the command below on a solaris shell or a
Windows xygwin shell:
xps -nw < xps.cmd
Simulationg the System
----------------------
To simulate the system please make sure you compile the system_modelsim.c file (without
print statements). After that run Tools --> Hardware Simulation (from the XPS GUI).
Please note you have to setup all EDK libraries as they are neccessary for the functional simulation and
provide the right path in the project options. Please refer to the getting_startet document for more information.
After Modelsim pops up execute the do_script.do script under ./simulation/do_script.do
近期下载者：
相关文件：
收藏者：