说明：  状态机及其VHDL设计,详细介绍了状态机的基本结构、功能和分类，以及有限状态机的一般设计思路与方法、状态机编码方案的恰当选取、Moore和Mealy状态机的本质区别及设计实现
(State machine and the VHDL design, described in detail the basic structure of state machines, function and classification, as well as finite state machine of the general design ideas and methods, state machine to select the appropriate coding schemes, Moore and Mealy state machine and design of the essential difference between the achievement of)