sin.tar
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：2KB
下载次数：115
上传日期：2009-01-15 21:10:44
上 传 者：
阳光微尘
说明： 神奇的sin波生成verilog源码，非常简单的代码无需乘法即可生成sin,cos，值得搞算法的人借鉴
(Magic sin wave generated Verilog source code, the code is very simple multiplication can be generated without sin, cos, worthy people from engaging in algorithm)
文件列表:
sin (0, 2009-01-14)
sin\RTL (0, 2009-01-14)
sin\RTL\CVS (0, 2009-01-14)
sin\RTL\CVS\Repository (8, 2009-01-14)
sin\RTL\CVS\Entries (44, 2009-01-14)
sin\RTL\CVS\Root (13, 2009-01-14)
sin\RTL\sin.v (2519, 2008-12-14)
sin\CVS (0, 2009-01-14)
sin\CVS\Repository (4, 2009-01-14)
sin\CVS\Entries (20, 2009-01-14)
sin\CVS\Root (13, 2009-01-14)
sin\SIM (0, 2009-01-14)
sin\SIM\sin_test.v (1957, 2008-12-14)
sin\SIM\CVS (0, 2009-01-14)
sin\SIM\CVS\Repository (8, 2009-01-14)
sin\SIM\CVS\Entries (49, 2009-01-14)
sin\SIM\CVS\Root (13, 2009-01-14)
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