can.tar

所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:53KB
下载次数:225
上传日期:2009-02-06 18:18:04
上 传 者yujunqi
说明:  can控制器IP核,verilog语言描述实现。含测试例
(can controller IP core, verilog language described realize. Containing the test cases)

文件列表:
can (0, 2007-06-11)
can\CVS (0, 2007-06-11)
can\CVS\Root (13, 2007-06-11)
can\CVS\Repository (4, 2007-06-11)
can\CVS\Entries (52, 2007-06-11)
can\bench (0, 2007-06-11)
can\bench\CVS (0, 2007-06-11)
can\bench\CVS\Root (13, 2007-06-11)
can\bench\CVS\Repository (10, 2007-06-11)
can\bench\CVS\Entries (14, 2007-06-11)
can\bench\verilog (0, 2007-06-11)
can\bench\verilog\CVS (0, 2007-06-11)
can\bench\verilog\CVS\Root (13, 2007-06-11)
can\bench\verilog\CVS\Repository (18, 2007-06-11)
can\bench\verilog\CVS\Entries (152, 2007-06-11)
can\bench\verilog\can_testbench.v (87107, 2006-04-25)
can\bench\verilog\can_testbench_defines.v (5386, 2006-04-25)
can\bench\verilog\timescale.v (3822, 2003-02-09)
can\doc (0, 2007-06-11)
can\doc\CVS (0, 2007-06-11)
can\doc\CVS\Root (13, 2007-06-11)
can\doc\CVS\Repository (8, 2007-06-11)
can\doc\CVS\Entries (10, 2007-06-11)
can\doc\src (0, 2007-06-11)
can\doc\src\CVS (0, 2007-06-11)
can\doc\src\CVS\Root (13, 2007-06-11)
can\doc\src\CVS\Repository (12, 2007-06-11)
can\doc\src\CVS\Entries (2, 2007-06-11)
can\rtl (0, 2007-06-11)
can\rtl\CVS (0, 2007-06-11)
can\rtl\CVS\Root (13, 2007-06-11)
can\rtl\CVS\Repository (8, 2007-06-11)
can\rtl\CVS\Entries (14, 2007-06-11)
can\rtl\verilog (0, 2007-06-11)
can\rtl\verilog\CVS (0, 2007-06-11)
can\rtl\verilog\CVS\Root (13, 2007-06-11)
can\rtl\verilog\CVS\Repository (16, 2007-06-11)
can\rtl\verilog\CVS\Entries (647, 2007-06-11)
can\rtl\verilog\can_acf.v (18889, 2005-04-08)
... ...

近期下载者

相关文件


收藏者