说明：  cpu设计实例mips。MIPSI指令集32位CPU（1）MiniCore设计实例全32位操作，32个32位通用寄存器，所有指令和地址全为32位 （2）静态流水线（3～5级） （3）Forwarding技术 （4）片内L1 Cache，指令、数据各4KByte，硬件初始化 （5）没有TLB，但系统控制协处理器（CP0）具有除页面映射外的全部功能
(cpu design example mips. MIPSI instruction set 32-bit CPU (1) MiniCore design example of the entire 32-bit operation, 32 32-bit general-purpose registers, all the commands and addresses are all 32-bit (2) static line (3 ~ 5) (3) Forwarding technology (4 )-chip L1 Cache, command, data of all 4KByte, hardware initialization (5) there is no TLB, but the system control coprocessor (CP0) with the exception of pages outside the full functionality of mapping)