vhdl-Algorithm-Hard-wired-logic
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：811KB
下载次数：4
上传日期：2009-03-03 23:07:13
上 传 者：
fengyun11747
说明： 大型数字系统设计中，vhdl中从算法到硬线逻辑实现的教程
(Large-scale digital system design, vhdl from hard-wired logic algorithm to realize the Tutorial)
文件列表:
vhdl-Algorithm-Hard-wired-logic\word\第一章.doc (47104, 2002-09-21)
vhdl-Algorithm-Hard-wired-logic\word\第七章.doc (1053696, 2002-09-21)
vhdl-Algorithm-Hard-wired-logic\word\第三章.doc (834048, 2005-11-26)
vhdl-Algorithm-Hard-wired-logic\word\第九章.doc (282875, 2002-09-21)
vhdl-Algorithm-Hard-wired-logic\word\第二章.doc (241664, 2002-09-21)
vhdl-Algorithm-Hard-wired-logic\word\第五章.doc (251904, 2005-11-26)
vhdl-Algorithm-Hard-wired-logic\word\第八章.doc (720384, 2002-09-21)
vhdl-Algorithm-Hard-wired-logic\word\第六章.doc (167936, 2005-11-26)
vhdl-Algorithm-Hard-wired-logic\word\第四章.doc (420864, 2002-09-21)
vhdl-Algorithm-Hard-wired-logic\word (0, 2009-03-03)
vhdl-Algorithm-Hard-wired-logic (0, 2009-03-03)
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