wb_dma_latest.tar
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：137KB
下载次数：9
上传日期：2009-03-29 14:28:30
上 传 者：
finelei2002
说明： wb_dma_latest.tar.gz,请需要的下载
(wb_dma_latest.tar.gz)
文件列表:
.\trunk (0, 2009-03-11)
.\trunk\bench (0, 2009-03-11)
.\trunk\bench\verilog (0, 2009-03-11)
.\trunk\bench\verilog\tests.v (59782, 2009-03-11)
.\trunk\bench\verilog\wb_model_defines.v (3142, 2009-03-11)
.\trunk\bench\verilog\wb_mast_model.v (10981, 2009-03-11)
.\trunk\bench\verilog\test_bench_top.v (11051, 2009-03-11)
.\trunk\bench\verilog\wb_slv_model.v (5018, 2009-03-11)
.\trunk\rtl (0, 2009-03-11)
.\trunk\rtl\verilog (0, 2009-03-11)
.\trunk\rtl\verilog\wb_dma_defines.v (4909, 2009-03-11)
.\trunk\rtl\verilog\wb_dma_ch_pri_enc.v (11678, 2009-03-11)
.\trunk\rtl\verilog\wb_dma_wb_slv.v (5975, 2009-03-11)
.\trunk\rtl\verilog\wb_dma_rf.v (63233, 2009-03-11)
.\trunk\rtl\verilog\wb_dma_top.v (32385, 2009-03-11)
.\trunk\rtl\verilog\wb_dma_wb_mast.v (5776, 2009-03-11)
.\trunk\rtl\verilog\wb_dma_inc30r.v (3939, 2009-03-11)
.\trunk\rtl\verilog\wb_dma_ch_sel.v (54344, 2009-03-11)
.\trunk\rtl\verilog\wb_dma_de.v (19490, 2009-03-11)
.\trunk\rtl\verilog\wb_dma_ch_rf.v (16347, 2009-03-11)
.\trunk\rtl\verilog\wb_dma_pri_enc_sub.v (5042, 2009-03-11)
.\trunk\rtl\verilog\wb_dma_wb_if.v (7147, 2009-03-11)
.\trunk\rtl\verilog\wb_dma_ch_arb.v (50454, 2009-03-11)
.\trunk\syn (0, 2009-03-11)
.\trunk\syn\bin (0, 2009-03-11)
.\trunk\syn\bin\read.dc (1880, 2009-03-11)
.\trunk\syn\bin\design_spec.dc (733, 2009-03-11)
.\trunk\syn\bin\comp.dc (3821, 2009-03-11)
.\trunk\syn\bin\lib_spec.dc (1126, 2009-03-11)
.\trunk\sim (0, 2009-03-11)
.\trunk\sim\rtl_sim (0, 2009-03-11)
.\trunk\sim\rtl_sim\bin (0, 2009-03-11)
.\trunk\sim\rtl_sim\bin\Makefile (2661, 2009-03-11)
.\trunk\doc (0, 2009-03-11)
.\trunk\doc\dma_doc.pdf (204701, 2009-03-11)
.\trunk\doc\STATUS.txt (2276, 2009-03-11)
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