ethernet_tri_mode_latest.tar
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：1079KB
下载次数：5
上传日期：2009-03-29 14:35:37
上 传 者：
finelei2002
说明： ethernet_tri_mode_latest.tar.gz源代码
(ethernet_tri_mode_latest.tar.gz source code)
文件列表:
.\trunk (0, 2009-03-11)
.\trunk\bench (0, 2009-03-11)
.\trunk\bench\verilog (0, 2009-03-11)
.\trunk\bench\verilog\altera_mf.v (1337985, 2009-03-11)
.\trunk\bench\verilog\User_int_sim.v (5496, 2009-03-11)
.\trunk\bench\verilog\host_sim.v (1706, 2009-03-11)
.\trunk\bench\verilog\reg_int_sim.v (6326, 2009-03-11)
.\trunk\bench\verilog\tb_top.v (9655, 2009-03-11)
.\trunk\bench\verilog\Phy_sim.v (4414, 2009-03-11)
.\trunk\start.tcl (5609, 2009-03-11)
.\trunk\rtl (0, 2009-03-11)
.\trunk\rtl\verilog (0, 2009-03-11)
.\trunk\rtl\verilog\eth_miim.v (16634, 2009-03-11)
.\trunk\rtl\verilog\TECH (0, 2009-03-11)
.\trunk\rtl\verilog\TECH\xilinx (0, 2009-03-11)
.\trunk\rtl\verilog\TECH\xilinx\CLK_DIV2.v (3598, 2009-03-11)
.\trunk\rtl\verilog\TECH\xilinx\CLK_SWITCH.v (3664, 2009-03-11)
.\trunk\rtl\verilog\TECH\xilinx\duram.v (1523, 2009-03-11)
.\trunk\rtl\verilog\TECH\altera (0, 2009-03-11)
.\trunk\rtl\verilog\TECH\altera\CLK_DIV2.v (3598, 2009-03-11)
.\trunk\rtl\verilog\TECH\altera\CLK_SWITCH.v (3532, 2009-03-11)
.\trunk\rtl\verilog\TECH\altera\duram.v (2405, 2009-03-11)
.\trunk\rtl\verilog\TECH\CLK_DIV2.v (3529, 2009-03-11)
.\trunk\rtl\verilog\TECH\CLK_SWITCH.v (3463, 2009-03-11)
.\trunk\rtl\verilog\TECH\duram.v (2405, 2009-03-11)
.\trunk\rtl\verilog\afifo.v (6425, 2009-03-11)
.\trunk\rtl\verilog\MAC_top.v (22795, 2009-03-11)
.\trunk\rtl\verilog\RMON.v (9224, 2009-03-11)
.\trunk\rtl\verilog\miim (0, 2009-03-11)
.\trunk\rtl\verilog\miim\eth_clockgen.v (5603, 2009-03-11)
.\trunk\rtl\verilog\miim\timescale.v (3153, 2009-03-11)
.\trunk\rtl\verilog\miim\eth_shiftreg.v (6843, 2009-03-11)
.\trunk\rtl\verilog\miim\eth_outputcontrol.v (6412, 2009-03-11)
.\trunk\rtl\verilog\header.v (190, 2009-03-11)
.\trunk\rtl\verilog\RMON (0, 2009-03-11)
.\trunk\rtl\verilog\RMON\RMON_dpram.v (1292, 2009-03-11)
.\trunk\rtl\verilog\RMON\RMON_addr_gen.v (11354, 2009-03-11)
.\trunk\rtl\verilog\RMON\RMON_ctrl.v (10097, 2009-03-11)
.\trunk\rtl\verilog\MAC_rx (0, 2009-03-11)
.\trunk\rtl\verilog\MAC_rx\CRC_chk.v (6212, 2009-03-11)
... ...
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