core8051_lcd1602
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：14341KB
下载次数：84
上传日期：2009-04-06 13:56:22
上 传 者：
lwb_2888
说明： 基于Fusion系列AFS600的FPGA的51核，在板子上试过，可以对51核写1602的显示程序，就可以显示了，也可以写其他的51程序。
(AFS600-based Fusion Series of FPGA 51 nuclear, tried on the board, you can write 1602 on 51 of the display of the nuclear program, we can show that we can process other 51.)
文件列表:
core8051_lcd1602\constraint\USER_CORE8051.pdc (1765, 2007-10-15)
core8051_lcd1602\core8051.prj (9733, 2008-12-20)
core8051_lcd1602\core8051.prj.convert.8.0.bak (6444, 2007-12-17)
core8051_lcd1602\core8051.prj.convert.8.1.bak (8915, 2008-12-14)
core8051_lcd1602\designer\impl1\ada02172-1.tmp (3326976, 2007-10-15)
core8051_lcd1602\designer\impl1\ada02172-3.tmp (3326976, 2007-10-15)
core8051_lcd1602\designer\impl1\ada02392-3.tmp (3326976, 2007-10-15)
core8051_lcd1602\designer\impl1\ada02392-5.tmp (3326976, 2007-10-15)
core8051_lcd1602\designer\impl1\designer.log (1485, 2008-12-20)
core8051_lcd1602\designer\impl1\designer_genhdl.log (1084, 2008-12-19)
core8051_lcd1602\designer\impl1\simulation\postlayout\@u@s@e@r_@c@o@r@e8051\verilog.psm (3177843, 2008-12-16)
core8051_lcd1602\designer\impl1\simulation\postlayout\@u@s@e@r_@c@o@r@e8051\_primary.dat (988789, 2008-12-16)
core8051_lcd1602\designer\impl1\simulation\postlayout\@u@s@e@r_@c@o@r@e8051\_primary.dbs (1359812, 2008-12-16)
core8051_lcd1602\designer\impl1\simulation\postlayout\@u@s@e@r_@c@o@r@e8051\_primary.vhd (250, 2008-12-16)
core8051_lcd1602\designer\impl1\simulation\postlayout\stimulus\verilog.psm (18346, 2008-12-16)
core8051_lcd1602\designer\impl1\simulation\postlayout\stimulus\_primary.dat (1541, 2008-12-16)
core8051_lcd1602\designer\impl1\simulation\postlayout\stimulus\_primary.dbs (2630, 2008-12-16)
core8051_lcd1602\designer\impl1\simulation\postlayout\stimulus\_primary.vhd (178, 2008-12-16)
core8051_lcd1602\designer\impl1\simulation\postlayout\tb_clock_minmax\verilog.psm (21836, 2008-12-16)
core8051_lcd1602\designer\impl1\simulation\postlayout\tb_clock_minmax\_primary.dat (2239, 2008-12-16)
core8051_lcd1602\designer\impl1\simulation\postlayout\tb_clock_minmax\_primary.dbs (3772, 2008-12-16)
core8051_lcd1602\designer\impl1\simulation\postlayout\tb_clock_minmax\_primary.vhd (837, 2008-12-16)
core8051_lcd1602\designer\impl1\simulation\postlayout\_info (686, 2008-12-16)
core8051_lcd1602\designer\impl1\USER_CORE8051.adb (4464640, 2008-12-20)
core8051_lcd1602\designer\impl1\USER_CORE8051.dtf\verify.log (233, 2008-12-20)
core8051_lcd1602\designer\impl1\USER_CORE8051.ide_des (721, 2008-12-20)
core8051_lcd1602\designer\impl1\USER_CORE8051.pdb (207360, 2008-12-20)
core8051_lcd1602\designer\impl1\USER_CORE8051.pdb.depends (107, 2008-12-20)
core8051_lcd1602\designer\impl1\USER_CORE8051.tcl (179, 2008-12-20)
core8051_lcd1602\designer\impl1\USER_CORE8051_ba.sdf (2379207, 2008-12-20)
core8051_lcd1602\designer\impl1\USER_CORE8051_ba.v (1777459, 2008-12-20)
core8051_lcd1602\designer\impl1\USER_CORE8051_fp\$$FlashPro_FPBBALTLPT1.L$$ (442, 2008-12-17)
core8051_lcd1602\designer\impl1\USER_CORE8051_fp\projectData\USER_CORE8051.pdb (211456, 2008-12-16)
core8051_lcd1602\designer\impl1\USER_CORE8051_fp\USER_CORE8051.log (1369, 2008-12-17)
core8051_lcd1602\designer\impl1\USER_CORE8051_fp_1\$$FlashPro_FPBBALTLPT1.L$$ (441, 2008-12-20)
core8051_lcd1602\designer\impl1\USER_CORE8051_fp_1\projectData\USER_CORE8051.pdb (208384, 2008-12-17)
core8051_lcd1602\designer\impl1\USER_CORE8051_fp_1\USER_CORE8051.log (1035, 2008-12-20)
core8051_lcd1602\designer\impl1\USER_CORE8051_fp_1\USER_CORE8051.pro (1564, 2008-12-17)
core8051_lcd1602\hdl\core8051_oci0_withoutio_pa3.v (1484186, 2007-07-10)
core8051_lcd1602\hdl\Core8051_ROM_Ctr.v (1546, 2007-09-29)
... ...
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