pif2wb_latest.tar
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：2204KB
下载次数：8
上传日期：2009-04-17 14:06:35
上 传 者：
realsmart
说明： This is is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone. It currently supports single-cycle as well as burst transfer operations. The core has been tested in a master-PIF slave-WB configuration.
文件列表:
.\trunk (0, 2009-03-11)
.\trunk\vhdl (0, 2009-03-11)
.\trunk\vhdl\top_tb.vhd (8783, 2009-03-11)
.\trunk\vhdl\addr_dec.vhd (776, 2009-03-11)
.\trunk\vhdl\counter.vhd (3000, 2009-03-11)
.\trunk\vhdl\pif2wb.vhd (15260, 2009-03-11)
.\trunk\vhdl\tran_reg.vhd (631, 2009-03-11)
.\trunk\vhdl\sel_reg.vhd (659, 2009-03-11)
.\trunk\vhdl\tb_pif2wb.vhd (17315, 2009-03-11)
.\trunk\PIF2WB_UserManual.pdf (2697022, 2009-03-11)
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