clock
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：288KB
下载次数：5
上传日期：2009-05-21 10:41:09
上 传 者：
bsyycool
说明： 用VHDL实现的完整数字钟代码，时分秒计时、校时、整点仿电台报时。
(Used to achieve a complete VHDL code digital clock, accurate time at school, the whole point of imitation time radio.)
文件列表:
clock\clock.asm.rpt (6935, 2008-12-04)
clock\clock.done (26, 2008-12-04)
clock\clock.fit.rpt (39053, 2008-12-04)
clock\clock.fit.summary (353, 2008-12-04)
clock\clock.flow.rpt (5577, 2008-12-04)
clock\clock.map.rpt (26832, 2008-12-04)
clock\clock.map.summary (270, 2008-12-04)
clock\clock.pin (18523, 2008-12-04)
clock\clock.pof (212108, 2008-12-04)
clock\clock.qpf (909, 2008-11-26)
clock\clock.qsf (2074, 2008-12-19)
clock\clock.qws (960, 2008-12-19)
clock\clock.sof (28232, 2008-12-04)
clock\clock.tan.rpt (181612, 2008-12-04)
clock\clock.tan.summary (3175, 2008-12-04)
clock\clock.vhd (2345, 2008-12-04)
clock\clock.vhd.bak (2340, 2008-12-04)
clock\cnt12_24.vhd (1468, 2008-12-04)
clock\cnt12_24.vhd.bak (1473, 2008-12-04)
clock\cnt60.vhd (895, 2008-11-26)
clock\cnt60.vhd.bak (894, 2008-11-26)
clock\control.vhd (788, 2008-12-04)
clock\control.vhd.bak (791, 2008-12-04)
clock\db\add_sub_njh.tdf (2406, 2008-11-26)
clock\db\clock.(0).cnf.cdb (2414, 2008-12-04)
clock\db\clock.(0).cnf.hdb (1260, 2008-12-04)
clock\db\clock.(1).cnf.cdb (678, 2008-12-04)
clock\db\clock.(1).cnf.hdb (964, 2008-12-04)
clock\db\clock.(10).cnf.cdb (550, 2008-11-26)
clock\db\clock.(10).cnf.hdb (441, 2008-11-26)
clock\db\clock.(11).cnf.cdb (491, 2008-11-26)
clock\db\clock.(11).cnf.hdb (434, 2008-11-26)
clock\db\clock.(12).cnf.cdb (3815, 2008-11-26)
clock\db\clock.(12).cnf.hdb (879, 2008-11-26)
clock\db\clock.(2).cnf.cdb (3545, 2008-12-04)
clock\db\clock.(2).cnf.hdb (750, 2008-12-04)
clock\db\clock.(3).cnf.cdb (2048, 2008-12-04)
clock\db\clock.(3).cnf.hdb (694, 2008-12-04)
clock\db\clock.(4).cnf.cdb (1757, 2008-12-04)
clock\db\clock.(4).cnf.hdb (1123, 2008-12-04)
... ...
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