state_machine_design
所属分类:VHDL/FPGA/Verilog
开发工具:Others
文件大小:471KB
下载次数:17
上传日期:2009-05-22 12:39:30
上 传 者:
maylag_1
说明: 这是讲解状态机的一个资料,里面讲解了摩尔和米勒状态机的设计实例,很详细且有实例。
(This is a state machine on the information, which Moore and Miller explained the design of state machine instances, and there are examples of very detailed.)
文件列表:
state_machine_design.pdf (970230, 2009-04-24)
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