EP1C3_12_7_SPCTR
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：209KB
下载次数：88
上传日期：2009-05-27 21:02:18
上 传 者：
deadtomb
说明： 基于FPGA的信号采集及频谱分析，用VHDL编写，压缩包里是Quartus下的工程。AD采样用状态机实现，并存入LPM_RAM。设计了一个UART模块（也是状态机实现的），可将数据发到ＰＣ机上。
(FPGA-based signal acquisition and spectral analysis, prepared with VHDL, Quartus compression bag is the next project. AD sampling state machine used to achieve, and deposited LPM_RAM. The design of a UART module (state machine is realized), the data can be sent to the PC machine.)
文件列表:
EP1C3_12_7_SPCTR\ADSRAM.VHD (2669, 2009-04-21)
EP1C3_12_7_SPCTR\ADSUART.ACF (14814, 2009-04-21)
EP1C3_12_7_SPCTR\ADSUART.asm.rpt (9312, 2009-04-21)
EP1C3_12_7_SPCTR\ADSUART.CDF (339, 2009-04-21)
EP1C3_12_7_SPCTR\ADSUART.done (26, 2009-04-21)
EP1C3_12_7_SPCTR\ADSUART.fit.summary (393, 2009-04-21)
EP1C3_12_7_SPCTR\ADSUART.flow.rpt (4083, 2009-04-21)
EP1C3_12_7_SPCTR\ADSUART.HIF (1520, 2009-04-21)
EP1C3_12_7_SPCTR\ADSUART.map.summary (331, 2009-04-21)
EP1C3_12_7_SPCTR\ADSUART.MMF (8, 2009-04-21)
EP1C3_12_7_SPCTR\ADSUART.PIN (19981, 2009-04-21)
EP1C3_12_7_SPCTR\ADSUART.QPF (1560, 2009-04-21)
EP1C3_12_7_SPCTR\ADSUART.QSF (10036, 2009-04-21)
EP1C3_12_7_SPCTR\ADSUART.QWS (1245, 2009-04-21)
EP1C3_12_7_SPCTR\ADSUART.SOF (74117, 2009-04-21)
EP1C3_12_7_SPCTR\ADSUART.tan.summary (3835, 2009-04-21)
EP1C3_12_7_SPCTR\ADSUART.VHD (6030, 2009-04-21)
EP1C3_12_7_SPCTR\cmp_state.ini (3, 2009-04-21)
EP1C3_12_7_SPCTR\LPMRAM.VHD (7343, 2009-04-21)
EP1C3_12_7_SPCTR\STP1.STP (46497, 2009-04-21)
EP1C3_12_7_SPCTR\SUART.VHD (2083, 2009-04-21)
EP1C3_12_7_SPCTR\U_BAUD.VHD (1009, 2009-04-21)
EP1C3_12_7_SPCTR\U_REC.VHD (4234, 2009-04-21)
EP1C3_12_7_SPCTR\U_XMIT.VHD (4513, 2009-04-21)
EP1C3_12_7_SPCTR (0, 2009-05-27)
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