cw
所属分类：VHDL/FPGA/Verilog
开发工具：Windows_Unix
文件大小：12246KB
下载次数：4
上传日期：2009-06-18 22:25:49
上 传 者：
jdgk888
说明： 用ip核设计的信号发生程序，altera的用ip核设计的信号发生程序，altera的用ip核设计的信号发生程序，altera的用ip核设计的信号发生程序，altera的用ip核设计的信号发生程序，altera的用ip核设计的信号发生程序，altera的用ip核设计的信号发生程序，altera的
(signal source for altera by ip coresignal source for altera by ip coresignal source for altera by ip coresignal source for altera by ip coresignal source for altera by ip coresignal source for altera by ip core)
文件列表:
cw (0, 2009-04-24)
cw\cw.asm.rpt (7074, 2009-04-24)
cw\cw.bdf (14365, 2009-04-24)
cw\cw.done (26, 2009-04-24)
cw\cw.fit.rpt (507463, 2009-04-24)
cw\cw.fit.smsg (513, 2009-04-24)
cw\cw.fit.summary (601, 2009-04-24)
cw\cw.flow.rpt (8323, 2009-04-24)
cw\cw.map.rpt (2428829, 2009-04-24)
cw\cw.map.smsg (9119, 2009-04-24)
cw\cw.map.summary (459, 2009-04-24)
cw\cw.pin (27573, 2009-04-24)
cw\cw.pof (524474, 2009-04-24)
cw\cw.qpf (903, 2009-04-23)
cw\cw.qsf (4691, 2009-04-24)
cw\cw.sim.rpt (9403465, 2009-04-24)
cw\cw.sof (240780, 2009-04-24)
cw\cw.tan.rpt (184330, 2009-04-24)
cw\cw.tan.summary (1684, 2009-04-24)
cw\cw.vwf (129698, 2009-04-23)
cw\drom.vhd (6342, 2009-04-15)
cw\fir.bsf (3292, 2009-04-24)
cw\fir.cmp (2127, 2009-04-24)
cw\fir.html (5442, 2009-04-24)
cw\fir.qip (814, 2009-04-24)
cw\fir.vec (456, 2009-04-24)
cw\fir.vhd (12428, 2009-04-24)
cw\fir.vho (2962859, 2009-04-24)
cw\fir.xml (6652, 2009-04-24)
cw\fir_ast.vhd (6469, 2009-04-24)
cw\fir_coef_int.txt (402, 2009-04-24)
cw\fir_constraints.tcl (4914, 2009-04-24)
cw\fir_input.txt (2517, 2009-04-24)
cw\fir_mlab.m (7211, 2009-04-24)
cw\fir_model.m (4609, 2009-04-24)
cw\fir_msim.tcl (12183, 2009-04-24)
cw\fir_nativelink.tcl (3184, 2009-04-24)
cw\fir_param.txt (1418, 2009-04-24)
cw\fir_silent_param.txt (723, 2009-04-24)
cw\fir_st.v (473097, 2009-04-24)
... ...
近期下载者：
相关文件：
收藏者：