Seg7_dsp
所属分类：VHDL/FPGA/Verilog
开发工具：QT
文件大小：723KB
下载次数：4
上传日期：2009-07-11 20:15:27
上 传 者：
snoppy2006
说明： 带有FPGA的pll模块的数字钟，带有仿真文件。
(With the FPGA module pll digital clock with a simulation file.)
文件列表:
Seg7_dsp\cmp_state.ini (2, 2007-04-20)
Seg7_dsp\Seg7_dsp.done (26, 2009-07-04)
Seg7_dsp\Seg7_dsp.fit.eqn (20699, 2007-04-18)
Seg7_dsp\Seg7_dsp.fit.summary (612, 2009-07-04)
Seg7_dsp\Seg7_dsp.map.eqn (15027, 2007-04-18)
Seg7_dsp\Seg7_dsp.map.summary (465, 2009-07-04)
Seg7_dsp\Seg7_dsp.pin (79191, 2009-07-04)
Seg7_dsp\Seg7_dsp.pof (2097354, 2009-07-04)
Seg7_dsp\Seg7_dsp.qpf (944, 2007-04-18)
Seg7_dsp\Seg7_dsp.qsf (4818, 2009-07-04)
Seg7_dsp\Seg7_dsp.sof (841105, 2009-07-04)
Seg7_dsp\Seg7_dsp.tan.summary (1527, 2009-07-04)
Seg7_dsp\Seg7_dsp_assignment_defaults.qdf (33007, 2009-06-27)
Seg7_dsp\Seg7_dsp.dpf (239, 2009-07-04)
Seg7_dsp\COUNTER60.VHD (1222, 2001-01-10)
Seg7_dsp\COUNTER24.VHD (1229, 2001-01-10)
Seg7_dsp\pll_cp_waveforms.html (623, 2009-07-04)
Seg7_dsp\pll_cp_wave0.jpg (36878, 2009-07-04)
Seg7_dsp\pll_cp.ppf (354, 2009-07-04)
Seg7_dsp\pll_cp.vhd (15013, 2009-07-04)
Seg7_dsp\pll_cp.cmp (906, 2009-07-04)
Seg7_dsp\seg_code.vhd.bak (947, 2009-07-04)
Seg7_dsp\seg_code.vhd (925, 2009-07-04)
Seg7_dsp\Seg7_dsp.fit.smsg (513, 2009-07-04)
Seg7_dsp\Seg7_dsp.vwf (22948, 2009-07-04)
Seg7_dsp\code.vhd.bak (1471, 2009-07-04)
Seg7_dsp\code.vhd (1491, 2009-07-04)
Seg7_dsp\Seg7_dsp.sim.rpt (84252, 2009-07-04)
Seg7_dsp\Seg7_dsp.vhd.bak (3804, 2009-07-04)
Seg7_dsp\Seg7_dsp.vhd (3651, 2009-07-04)
Seg7_dsp\Seg7_dsp.map.rpt (62108, 2009-07-04)
Seg7_dsp\Seg7_dsp.fit.rpt (202155, 2009-07-04)
Seg7_dsp\Seg7_dsp.asm.rpt (7720, 2009-07-04)
Seg7_dsp\Seg7_dsp.tan.rpt (188321, 2009-07-04)
Seg7_dsp\Seg7_dsp.flow.rpt (4987, 2009-07-04)
Seg7_dsp\Seg7_dsp.qws (581, 2009-07-04)
Seg7_dsp\db\Seg7_dsp_cmp.qrpt (0, 2007-04-18)
Seg7_dsp\db\Seg7_dsp.db_info (152, 2009-06-27)
Seg7_dsp\db\Seg7_dsp.tis_db_list.ddb (189, 2009-07-04)
Seg7_dsp\db\prev_cmp_Seg7_dsp.map.qmsg (22670, 2009-07-04)
... ...
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