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所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:89KB
下载次数:31
上传日期:2009-07-20 09:25:27
上 传 者yeyanbin
说明:  IS-95/CDMA2000基带成形滤波器的实现 IS-95滤波器的实现: 本次设计采用转置型结构,并用展开技术将字串行架构转换成字并行处理架构,从而提高运行的速度。本次设计中采用展开因子J=4的展开转换技术。设输入数据为filter_in,输出数据为filter_out,则其展开因子J=4的并行处理系统如下图所示
(IS-95/CDMA2000 base-band filter shaping to achieve IS-95 filter to achieve: the design of the structure used to purchase and use of technology will be launched into a string word line structure parallel processing structure, thereby enhancing the speed of operation. The design factor used to start the J = 4 expand conversion technologies. Input data set for filter_in, output data for filter_out, then the factor J = 4 expand the parallel processing system as follows)

文件列表:
is-95基带成型滤波器&48阶fir滤波器\48_fir_4_tb.v (14193, 2007-10-24)
is-95基带成型滤波器&48阶fir滤波器\48_fir_tb_1.v (5413, 2009-06-07)
is-95基带成型滤波器&48阶fir滤波器\IS-95基带成形滤波器.doc (232448, 2007-11-16)
is-95基带成型滤波器&48阶fir滤波器\wave_1.bmp (817494, 2007-10-24)
is-95基带成型滤波器&48阶fir滤波器\wave_2.bmp (1216082, 2007-10-29)
is-95基带成型滤波器&48阶fir滤波器\wave_3.bmp (814846, 2007-10-29)
is-95基带成型滤波器&48阶fir滤波器\wave_4.bmp (1397054, 2007-10-24)
is-95基带成型滤波器&48阶fir滤波器\wenli020.m (1128, 2007-10-29)
is-95基带成型滤波器&48阶fir滤波器 (0, 2009-06-15)

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