说明：  串并FIR滤波器设计:并行FIR滤波器具有速度快、容易设计的特点，但是要占用大量的资源。在多阶数的亚高频系统设计中，使用并行结构并不合算，但亚高频系统需要较高的处理速度，而串行架构往往达不到要求，因此，结合串并这两种设计方法的长处，在使用较少的硬件资源的同时实现了较高的处理速度，这里说明一种65阶八路并行、支路串行FIR滤波器的设计（实际使用了1个乘法器，8个乘累加器，一个累加器）。
(String and FIR filter design: parallel FIR filter with a fast, easy design features, but I want to use up a lot of resources. In a multi-order high-frequency sub-system design, the use of parallel structures and uneconomical, but the high frequency sub-system requires a higher processing speed, and the serial structure often fail, therefore, combines both the design of string and method' s strengths, using less hardware resources to achieve a high processing speed of 65 bands here that a parallel eight-way, slip serial FIR filter design (the actual use of a multiplier, 8 by accumulator, an accumulator).)