PCI_VHDL
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：104KB
下载次数：18
上传日期：2009-08-31 10:47:11
上 传 者：
fmm_hello
说明： vhdl实现pci，找了很久才下到。应该比较适合设计
(vhdl implementation pci, looking for a long time before the next to. Should be more suitable for design)
文件列表:
PCI_VHDL\cmp_state.ini (2, 2005-07-12)
PCI_VHDL\core\t32.bsf (7588, 2004-08-21)
PCI_VHDL\core\t32.cmp (2688, 2004-08-21)
PCI_VHDL\core\t32.html (6318, 2004-08-21)
PCI_VHDL\core\t32.inc (2049, 2004-08-21)
PCI_VHDL\core\t32.v (21919, 2004-08-21)
PCI_VHDL\core\t32.vo (120318, 2004-08-21)
PCI_VHDL\core\t32_bb.v (2538, 2004-08-21)
PCI_VHDL\core\t32_inst.v (2369, 2004-08-21)
PCI_VHDL\db\top_pci32.(0).cnf.cdb (5428, 2005-04-06)
PCI_VHDL\db\top_pci32.(0).cnf.hdb (2519, 2005-04-06)
PCI_VHDL\db\top_pci32.(1).cnf.cdb (6226, 2005-04-06)
PCI_VHDL\db\top_pci32.(1).cnf.hdb (3015, 2005-04-06)
PCI_VHDL\db\top_pci32.(2).cnf.cdb (11253, 2005-04-06)
PCI_VHDL\db\top_pci32.(2).cnf.hdb (2694, 2005-04-06)
PCI_VHDL\db\top_pci32.(3).cnf.cdb (7975, 2005-04-06)
PCI_VHDL\db\top_pci32.(3).cnf.hdb (2227, 2005-04-06)
PCI_VHDL\db\top_pci32.(4).cnf.cdb (4555, 2005-04-06)
PCI_VHDL\db\top_pci32.(4).cnf.hdb (1252, 2005-04-06)
PCI_VHDL\db\top_pci32.(5).cnf.cdb (3963, 2005-04-06)
PCI_VHDL\db\top_pci32.(5).cnf.hdb (951, 2005-04-06)
PCI_VHDL\db\top_pci32.cmp.rdb (2655, 2005-04-06)
PCI_VHDL\db\top_pci32.db_info (136, 2005-04-06)
PCI_VHDL\db\top_pci32.eco.cdb (142, 2005-07-12)
PCI_VHDL\db\top_pci32.hif (2800, 2005-04-06)
PCI_VHDL\db\top_pci32.map.hdb (4869, 2005-04-06)
PCI_VHDL\db\top_pci32.map.qmsg (6594, 2005-04-06)
PCI_VHDL\db\top_pci32.sld_design_entry.sci (134, 2005-07-12)
PCI_VHDL\db\top_pci32.sld_design_entry_dsc.sci (134, 2005-04-06)
PCI_VHDL\local\lcd_cntrl.v (4825, 2004-10-14)
PCI_VHDL\local\mem_cntrl.v (10459, 2004-10-14)
PCI_VHDL\local\perip.v (8531, 2004-10-14)
PCI_VHDL\local\temp_cntrl.v (5059, 2004-10-14)
PCI_VHDL\local\top_local.v (6897, 2004-10-14)
PCI_VHDL\top_pci32.flow.rpt (3493, 2005-04-06)
PCI_VHDL\top_pci32.map.rpt (11192, 2005-04-06)
PCI_VHDL\top_pci32.map.summary (282, 2005-04-06)
PCI_VHDL\top_pci32.qpf (1561, 2005-04-06)
PCI_VHDL\top_pci32.qsf (3205, 2005-04-06)
... ...
This directory has the rtl (Verilog) associated with the MAX II PCI reference design.
top_pci32.v is the top level of the design. The core directory contains the wizard
generated files for the 32-bit/33 MHz PCI Target.
The local directory has all the files for local reference design.
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