FIR

所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:154KB
下载次数:7
上传日期:2009-09-02 21:48:01
上 传 者nailifeng
说明:  FIR of 1024 stage. 面向alteraFPGA器件设计
(FIR of 1024 stage)

文件列表:
FIR.flow.rpt (4698, 2009-09-02)
FIR.map.rpt (104094, 2009-09-02)
FIR.map.summary (362, 2009-09-02)
FIR.mif (974, 2009-09-02)
FIR.pin (31102, 2009-09-02)
FIR.qpf (908, 2009-09-02)
FIR.qsf (2197, 2009-09-02)
FIR.qws (1845, 2009-09-02)
FIR.v (78918, 2009-09-02)
FIR.v.bak (50380, 2009-09-02)
my_sf.v (14096, 2009-09-02)
my_sf.v.bak (10598, 2009-09-02)
rom.v (6173, 2009-09-02)
rom_bb.v (4880, 2009-09-02)
rom_wave0.jpg (137594, 2009-09-02)
rom_waveforms.html (1148, 2009-09-02)
sf.v (46349, 2009-09-02)
sf_bb.v (26299, 2009-09-02)
FIR.done (26, 2009-09-02)
FIR.fit.rpt (1464639, 2009-09-02)
FIR.fit.smsg (411, 2009-09-02)
FIR.fit.summary (406, 2009-09-02)

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