CPU_1
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：78KB
下载次数：6
上传日期：2009-09-28 18:04:42
上 传 者：
ryanhjq
说明： 此文件为cpu的verilog学习代码，从最简单的cpu开始学习
(This file is cpu to study the verilog code, from the simplest cpu to start learning)
文件列表:
CPU_1\simple\simplecpu_design.doc (156672, 2005-04-15)
CPU_1\simple\src\ac.v (251, 2005-04-15)
CPU_1\simple\src\alu.v (380, 2005-04-15)
CPU_1\simple\src\ar.v (204, 2005-04-15)
CPU_1\simple\src\control.v (2843, 2005-04-15)
CPU_1\simple\src\cpu.v (1043, 2005-04-15)
CPU_1\simple\src\cpu.v.bak (1043, 2005-04-15)
CPU_1\simple\src\dr.v (219, 2005-04-15)
CPU_1\simple\src\ir.v (202, 2005-04-15)
CPU_1\simple\src\m.v (394, 2005-04-15)
CPU_1\simple\src\pc.v (231, 2005-04-15)
CPU_1\simple\src\top.v (293, 2005-04-15)
CPU_1\simple\src\wave.awf (17868, 2005-04-15)
CPU_1\simple\src\说明.txt (759, 2005-04-15)
CPU_1\simple\src (0, 2009-09-28)
CPU_1\simple (0, 2009-09-28)
CPU_1 (0, 2009-09-28)
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