hdlc
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：193KB
下载次数：134
上传日期：2009-10-25 18:26:38
上 传 者：
setagllib
说明： 基于FPGA的HDLC协议控制器，能完成插零，删除0操作。
(HDLC controller base on FPGA)
文件列表:
hdlc\CVS\Root (58, 2009-02-21)
hdlc\CVS\Repository (6, 2009-02-21)
hdlc\CVS\Template (0, 2009-02-21)
hdlc\CVS\Entries (35, 2009-02-21)
hdlc\CODE\CVS\Root (58, 2009-02-21)
hdlc\CODE\CVS\Repository (11, 2009-02-21)
hdlc\CODE\CVS\Template (0, 2009-02-21)
hdlc\CODE\CVS\Entries (178, 2009-02-21)
hdlc\CODE\MEM_PKG.VHD (7237, 2001-04-28)
hdlc\CODE\SPMEM.VHD (15033, 2001-04-28)
hdlc\CODE\tools_pkg.vhd (11590, 2001-04-28)
hdlc\CODE\LIBS\CVS\Root (58, 2009-02-21)
hdlc\CODE\LIBS\CVS\Repository (16, 2009-02-21)
hdlc\CODE\LIBS\CVS\Template (0, 2009-02-21)
hdlc\CODE\LIBS\CVS\Entries (110, 2009-02-21)
hdlc\CODE\LIBS\PCK_CRC16_D8.vhd (3094, 2001-04-28)
hdlc\CODE\LIBS\hdlc_components_pkg.vhd (12434, 2001-04-28)
hdlc\CODE\RX\CVS\Root (58, 2009-02-21)
hdlc\CODE\RX\CVS\Repository (14, 2009-02-21)
hdlc\CODE\RX\CVS\Template (0, 2009-02-21)
hdlc\CODE\RX\CVS\Entries (37, 2009-02-21)
hdlc\CODE\RX\CORE\CVS\Root (58, 2009-02-21)
hdlc\CODE\RX\CORE\CVS\Repository (19, 2009-02-21)
hdlc\CODE\RX\CORE\CVS\Template (0, 2009-02-21)
hdlc\CODE\RX\CORE\CVS\Entries (192, 2009-02-21)
hdlc\CODE\RX\CORE\RxChannel.vhd (4969, 2001-04-28)
hdlc\CODE\RX\CORE\Rxcont.vhd (5656, 2001-04-28)
hdlc\CODE\RX\CORE\Zero_detect.vhd (6810, 2001-04-28)
hdlc\CODE\RX\CORE\flag_detect.vhd (3945, 2001-01-13)
hdlc\CODE\RX\SCRIPTS\CVS\Root (58, 2009-02-21)
hdlc\CODE\RX\SCRIPTS\CVS\Repository (22, 2009-02-21)
hdlc\CODE\RX\SCRIPTS\CVS\Template (0, 2009-02-21)
hdlc\CODE\RX\SCRIPTS\CVS\Entries (44, 2009-02-21)
hdlc\CODE\RX\SCRIPTS\WAVE.DO (983, 2001-01-13)
hdlc\CODE\RX\TB\CVS\Root (58, 2009-02-21)
hdlc\CODE\RX\TB\CVS\Repository (17, 2009-02-21)
hdlc\CODE\RX\TB\CVS\Template (0, 2009-02-21)
hdlc\CODE\RX\TB\CVS\Entries (46, 2009-02-21)
hdlc\CODE\RX\TB\Rx_tb.vhd (5063, 2001-01-13)
hdlc\CODE\TOP\CVS\Root (58, 2009-02-21)
... ...
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