ethernet_tri_mode.tar
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：670KB
下载次数：24
上传日期：2009-11-11 17:48:04
上 传 者：
zhangpeng1985
说明： 基于verilog编写以太网激励程序源代码
(Ethernet-based incentive program write verilog source code)
文件列表:
ethernet_tri_mode (0, 2007-08-26)
ethernet_tri_mode\CVS (0, 2007-08-26)
ethernet_tri_mode\CVS\Root (13, 2007-08-26)
ethernet_tri_mode\CVS\Repository (18, 2007-08-26)
ethernet_tri_mode\CVS\Entries (94, 2007-08-26)
ethernet_tri_mode\start.tcl (5607, 2006-05-28)
ethernet_tri_mode\bench (0, 2007-08-26)
ethernet_tri_mode\bench\CVS (0, 2007-08-26)
ethernet_tri_mode\bench\CVS\Root (13, 2007-08-26)
ethernet_tri_mode\bench\CVS\Repository (24, 2007-08-26)
ethernet_tri_mode\bench\CVS\Entries (14, 2007-08-26)
ethernet_tri_mode\bench\verilog (0, 2007-08-26)
ethernet_tri_mode\bench\verilog\CVS (0, 2007-08-26)
ethernet_tri_mode\bench\verilog\CVS\Root (13, 2007-08-26)
ethernet_tri_mode\bench\verilog\CVS\Repository (32, 2007-08-26)
ethernet_tri_mode\bench\verilog\CVS\Entries (265, 2007-08-26)
ethernet_tri_mode\bench\verilog\Phy_sim.v (4468, 2006-11-18)
ethernet_tri_mode\bench\verilog\User_int_sim.v (5453, 2006-11-18)
ethernet_tri_mode\bench\verilog\altera_mf.v (1337985, 2006-01-19)
ethernet_tri_mode\bench\verilog\host_sim.v (1706, 2006-01-19)
ethernet_tri_mode\bench\verilog\reg_int_sim.v (6397, 2005-12-13)
ethernet_tri_mode\bench\verilog\tb_top.v (9385, 2006-01-19)
ethernet_tri_mode\doc (0, 2007-08-26)
ethernet_tri_mode\doc\CVS (0, 2007-08-26)
ethernet_tri_mode\doc\CVS\Root (13, 2007-08-26)
ethernet_tri_mode\doc\CVS\Repository (22, 2007-08-26)
ethernet_tri_mode\doc\CVS\Entries (157, 2007-08-26)
ethernet_tri_mode\doc\Tri-mode_Ethernet_MAC_Specifications.pdf (313150, 2006-01-25)
ethernet_tri_mode\doc\Tri-mode_Ethernet_MAC_Verification_plan.pdf (144899, 2006-01-19)
ethernet_tri_mode\rtl (0, 2007-08-26)
ethernet_tri_mode\rtl\CVS (0, 2007-08-26)
ethernet_tri_mode\rtl\CVS\Root (13, 2007-08-26)
ethernet_tri_mode\rtl\CVS\Repository (22, 2007-08-26)
ethernet_tri_mode\rtl\CVS\Entries (14, 2007-08-26)
ethernet_tri_mode\rtl\verilog (0, 2007-08-26)
ethernet_tri_mode\rtl\verilog\CVS (0, 2007-08-26)
ethernet_tri_mode\rtl\verilog\CVS\Root (13, 2007-08-26)
ethernet_tri_mode\rtl\verilog\CVS\Repository (30, 2007-08-26)
ethernet_tri_mode\rtl\verilog\CVS\Entries (433, 2007-08-26)
ethernet_tri_mode\rtl\verilog\Clk_ctrl.v (5316, 2006-01-19)
... ...
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