文件列表:

ssd192Xv1 (0, 2007-03-08)
ssd192Xv1\02.h (117358, 2007-01-08)
ssd192Xv1\api (0, 2007-03-08)
ssd192Xv1\api\enhance (0, 2007-03-08)
ssd192Xv1\api\enhance\2DEnhance.c (17358, 2007-03-08)
ssd192Xv1\api\enhance\2DEnhance.h (2422, 2006-12-07)
ssd192Xv1\api\enhance\charmap.h (59639, 2006-09-20)
ssd192Xv1\api\enhance\charmap_v.h (118932, 2006-08-24)
ssd192Xv1\api\enhance\cursor.c (7373, 2007-03-09)
ssd192Xv1\api\enhance\cursor.h (416, 2006-09-21)
ssd192Xv1\api\enhance\enhance.h (2044, 2006-08-24)
ssd192Xv1\api\enhance\jpeg.c (7096, 2007-03-08)
ssd192Xv1\api\enhance\Makefile (484, 2006-08-24)
ssd192Xv1\api\enhance\memory.c (10678, 2007-03-08)
ssd192Xv1\api\enhance\memory.h (804, 2006-10-09)
ssd192Xv1\api\enhance\mjpeg.c (70664, 2007-03-08)
ssd192Xv1\api\enhance\mjpeg.h (7040, 2006-08-24)
ssd192Xv1\api\enhance\register.c (1750, 2006-08-24)
ssd192Xv1\api\enhance\window.c (46047, 2007-03-08)
ssd192Xv1\api\enhance\window.h (1662, 2006-08-24)
ssd192Xv1\api\Makefile (252, 2006-08-24)
ssd192Xv1\api\primary (0, 2007-03-08)
ssd192Xv1\api\primary\2d.c (16930, 2007-03-08)
ssd192Xv1\api\primary\2d.h (3023, 2007-03-08)
ssd192Xv1\api\primary\cam (0, 2007-03-08)
ssd192Xv1\api\primary\camera.c (2263, 2007-03-08)
ssd192Xv1\api\primary\camera.h (308, 2007-03-08)
ssd192Xv1\api\primary\cam\dvd.c (3762, 2007-03-08)
ssd192Xv1\api\primary\cam\dvd.h (123, 2006-08-24)
ssd192Xv1\api\primary\cam\dvNTSC.c (4031, 2007-03-08)
ssd192Xv1\api\primary\cam\dvPAL.c (3917, 2007-03-08)
ssd192Xv1\api\primary\cam\hv7131.c (4756, 2007-03-08)
ssd192Xv1\api\primary\cam\hv7131.h (129, 2006-08-24)
ssd192Xv1\api\primary\cam\i2c.h (4943, 2007-03-08)
ssd192Xv1\api\primary\cam\Makefile (490, 2006-08-24)
ssd192Xv1\api\primary\cam\ov7670.c (2715, 2007-03-08)
ssd192Xv1\api\primary\cam\ov7670.h (219, 2006-08-09)
ssd192Xv1\api\primary\cam\ov9640.c (1372, 2007-03-08)
ssd192Xv1\api\primary\cam\ov9640.h (216, 2006-08-24)
ssd192Xv1\api\primary\cam\sam2m.c (1729, 2007-03-08)
... ...

SDHC Performance Benchmark - 22 Feb 2005 ---------------------------------------- This version has only been tested on the FPGA XC2V3000 without interrupt enabling. What's new ---------- demo1923 has been extended with a new sdhc sub-command. The new sub-command is --sdhc mbench. 1. --sdhc mbench - mbench will perform 8/16/32-bit read & write access combinations to a ***KB region of the amazon memory (0x70000-0x7ffff). It will then print the total time taken to perform the accesses. The time is counted in terms of ticks (1 tick ~= 0.9766 microseconds). 2. --sdhc set,xmode,[0|1] The above command will turn off (xmode=0) or turn on (xmode=1) mcu access during read/write. When xmode=0, demo1923 will read/write sdhc data to amazon memory. When xmode=1, demo1923 will not read/write sdhc data, instead it will activate the sdhc module for a read or write transfer. This mode requires that dma is also turned on (--sdhc set,dma,1). 3. --sdhc read or --sdhc write The above commands will perform the sdhc read or write transaction and print the total time (ticks) that it took to complete the entire transfer. The tick time counts the kernel-mode sdhc_read() or sdhc_write() function call. This time includes the time taken to send the command, and wait for transfer completion. a. The sequence of commands to effect a transfer -> sdhc init -> sdhc set,length,512 -> sdhc set,width,4 -> sdhc set,dma,1 -> sdhc set,autocmd12,1 -> sdhc set,xmode,1 -> sdhc set,sdclk,1 <-- this divides the core_mclk_in by (1+1)=2. -> sdhc read,0,n <-- data is read into dma buffer from sd card -> sdhc write,0,n <-- data from dma buffer is written to sd card Important: when xmode=1, the data content is ignored. i.e. read will continue to overwrite dma buffer data and write will use existing data from the dma buffer. [end] SDHC_CJS_Use_Case_27Jan05 (Sreedharan Bhaskaran, sreeb@solomon-systech.com) --------------------------------------------------------------------------- What's new ---------- This is a special version of sdhc. This is not to be used as a test program. The file sdreg.c contains both kernel mode and user mode code and are integrated into the ssd192Xdrv.o and demo192X executable. demo1923 has been extended with the sdhc commands. The sdhc subcommands are: 1. --sdhc init - to initialise the sd card 2. --sdhc reset - to reset the sd card 3. --sdhc get,[cid|csd|scr|cccr|fbr|cis|wrblkcnt|status|cardtype] - to readback sd registers 4. --sdhc set,[length,<1..512>|width,<1|4>|sdclk,<0xNN>|dma,<[0|1|base,]>|autocmd12,<0|1>] - to configure sdhc and sd card access types 5. --sdhc read,addr,nblk - to read one or more blks of data from SD Memory/MMC 6. --sdhc write,addr,nblk - to write one or more blks of data from SD Memory/MMC 7. --sdhc abort - to abort a read or write transaction 8. --sdhc ioread,addr,nblk - to read one or more blks of data from SDIO card 9. --sdhc iowrite,addr,nblk - to write one or more blks of data from SDIO card 10. --sdhc ioabort - to abort an ioread or iowrite transaction 11. --sdhc erase,start,nblk - to erase one or more blks of data from address The meaning and usage of the above commands are described in the prior release information below. [end] SDHC_R317C_31Dec04 (Sreedharan Bhaskaran, sreeb@solomon-systech.com) ------------------------------------------------------------------ What's new ---------- This is a special version of sdhc test program that contains a replacement for read_data and write_data routines. 2 new functions have been added and these are sdhc_read() and sdhc_write(). read_data() and write_data() try to align the end address of a dma transfer on a dma host addr boundary to cause an interrupt, but the sdhc_read() and sdhc_write() routines can align the transfer to the start address of the dma buffer. eg. blksize=512 bytes, dma start=x, dma end=y 1. For read_data/write_data (filesystem mode): 'y-512' is the start address for dma transfer 2. For sdhc_read/sdhc_write (internal FIFO transfer mode): 'x' is the start address for dma transfer sdhc_read/sdhc_write supports both the filesystem and FIFO transfer mode through the flags parameter (RW_NOREAD_EN and RW_NOFILL_EN flag bits control the behavior). SDHC_R317b_16Dec04 (Sreedharan Bhaskaran, sreeb@solomon-systech.com) ------------------------------------------------------------------ What's new ---------- This is a minor update. It fixes 2 functions (read_scr() and get_wr_blk_count()). These functions use the fifo for data transfer and did not reset the fifo prior to transfer which in some cases caused the fifo state to be unsynchronised with the transfer. [end] SDHC_R317a_16Dec04 (Sreedharan Bhaskaran, sreeb@solomon-systech.com) ------------------------------------------------------------------ What's new ---------- 1. Added new IO_RW_EXTENDED command support for both Byte Mode and Multiblock mode support. 2. New command to make use of IO_RW_EXTENDED re-uses the command syntax of the existing 'repeat', 'read' and 'write' commands for SD Memory and MMC. 3. Commands a. io read [-c [pattern] | -b [start_num] | -f ] b. io write [pattern | -b [start_num]| -f | -x] c. io repeat read [-c [pattern] | -b [start_num] | -f ] d. io repeat write [pattern | -b [start_num]| -f | -x] Please refer to release notes of SDHC_R312pre4_13Oct04, found below, on the above command syntax documentation. IO_RW_EXTENDED has 2 flavors (or modes). In the first mode, it is used as a single block read/write command. In the second, it can be used as a multi-block transfer command. All SDIO cards support the single block read/write command but support for multi-block support is optional and indicated via the SMB bit in the CCCR. (Use 'decode cccr' to check this bit). If SMB=0, then only single block read and write commands are possible. In this case, the parameter in the 'io read' and 'io write' commands has to be 0 or else the command will be rejected. 'io repeat' can still be used because it issues a single read/write command multiple times and the nblk parameter can be non-zero. [end] SDHC_R317_15Dec04 (Sreedharan Bhaskaran, sreeb@solomon-systech.com) ------------------------------------------------------------------ What's new ---------- 1. SDIO Initialisation This release adds lots of new code to support SDIO initialisation, SDIO direct read and write commands and decode of several SDIO standard registers. The SDIO functions have been tested against an SD COMBO Card (San Disk 256MB+WiFi). The test program will automatically detect an SDIO card and follow the SDIO-aware host initialisation procedure recommended in the SDIO Specification. 2. New Commands In addition to changes to existing 'init' commands, the following 19 new commands have been added. (a) ioinit (no space between io & init) (b) io reset (c) io r (d) io w (e) io set width <1|4> (f) io set blksz -f <0..7> (g) io get cccr (h) io get fbr <1..7> (i) io get cis <0..7> (j) io raw (k) io fn <1..7> (l) io help (m) io abort <0..7> (n) decode cis (o) decode cccr (p) decode fbr (q) dump cis (s) dump cccr (t) dump fbr 3. Detailed Explanation (a) ioinit (no space between io & init) This command performs SDIO specific initialisation. It detects for an SDIO card, through CMD5, and if a response is detected, it will attempt to initialise. If the CMD5 results in a timeout error, the ioinit will give up detection of an SDIO card. (b) io reset This will send a IO Reset to the SDIO Card and all its IO functions. It will not reset the SD Memory portion if present. In order to reinitialise the card, the SD Memory has also to be reset. eg. ready> send reset <-- to reset the SD Memory portion ready> io reset <-- to reset the SDIO portion ready> init <-- start the re-initialisation (c) io r This commands performs a direct byte read (IO_RW_DIRECT) at the specified register address. The register address can be anywhere within the 128KB address space. An SDIO card can implement upto 1+7 IO Functions, FN0..FN7 where FN0 is mandatory. Each function has its own unique 128KB address space. The function to which the read command is directed is set by the 'io fn <0..7>'. Default is FN0. eg. ready> io fn 1 <- direct read commands to FN1 ready> io r 0x10 <-- read the block size (LSB) ready> io r 0x11 <-- read the block size (MSB) (d) io w This command performs a direct byte write (IO_RW_DIRECT) at the specified address. An SDIO card can implement upto 1+7 IO Functions, FN0..FN7 where FN0 is mandatory. Each function has its own unique 128KB address space. The register address can be anywhere within the 128KB address space. eg. to set the block size for transfer to 512 bytes (0x0200) ready> io fn 1 <- direct write commands to FN1 ready> io w 0x10 0x00 <-- write the block size (LSB) ready> io w 0x11 0x02 <-- write the block size (MSB) (e) io set width <1|4> This command sets the bus width of the IO function. It is independent of the bus width setting of the SD Memory part (in case of a COMBO card). This command writes to FN0, address 0x07 and sets the Bus Width bits according to the selection. If the card is a LOW SPEED Card (LSC=1) and does not support the 4-bit option (4BLS=0), then the command will be rejected. The Card Capability Register can be determined by reading the CCCR and then running the 'decode cccr' command. eg. ready> io get cccr <-- performs automatic decode of cccr ready> io set width 1 <-- can always be done ready> io set width 4 <-- allowed only if LSC=0 (i.e. high speed card) or LSC=1 and 4BLS=1 are both 1. ready> io set width 1 <-- will always succeed (f) io set blksz -f <0..7> This command sets the Block Size for Multi-Block Transfer. The Card Capability Register in the CCCR indicates support for Multi-Block Transfers via the SMB bit. If SMB=1, then the card supports Multi-Block Transfers and CMD53 (IO_RW_EXTENDED) can be used, otherwise, the command will be rejected. Run 'decode cccr' to display the SMB bit value. eg. ready> io get cccr <-- performs automatic decode of cccr ready> decode cccr <-- if a previous 'io get cccr' has been run ready> io set blksz 0x200 -f 0 <-- if SMB=1, then command will be accepted, else it will be rejected. (g) io get cccr This is the very first command that needs to be run after the card (both IO & Memory has been initialised). This command will read the CCCR register on the card, decode and display its contents. This command needs to be run only once per initialisation. eg. ready> io get cccr <-- will read the CCCR and decode its contents (h) io get fbr <1..7> This command is like the io get cccr function. Instead of reading the Card Common Control Registers, it reads the IO Function Specific Registers. Function 1 to 7 can be selected. The command is rejected if an unimplemented function number is specified. eg. If there is only one IO Function, and 'io get fbr 2' is run, then the command is rejected. The specified FBR of the Function is read and then automatically decoded. (i) io get cis <0..7> This command reads the Card Information Structure from the CCCR area and from the IO Function areas of the IO Card. The start of CIS is specified in the CCCR and FBR (CIS_PTR locations). The CIS is then parsed and decoded. Unknown TUPLE IDs are skipped. eg. ready> io get cis 0 <-- will read the CIS of the CCCR (FN0) ready> io get cis 1 <-- will read the CIS of the FN1 ready> decode cis <-- will decode the last read CIS (eg. FN1) (j) io raw - turn on read-after-write option This command affects the 'io w' command. When 'raw' is set to 'on', then the IO_RW_DIRECT command will cause a Read-After-Write of the register. When raw is set to 'off', then write-only is performed. When raw is set to 'on' it saves an additional read command cycle to readback the previously written register. eg. ready> io raw on ready> io w 0x10 0xaa <-- this command will write 0xaa and readback the value <-- at 0x10 ready> io raw off ready> io w 0x10 0x55 <-- this command will write 0xaa and no <-- read-after-write is performed. ready> io r 0x10 <-- this command effectively performs the raw function (k) io fn <1..7> - to set the target function for r/w commands This command selects the function to which the 'io r' and 'io w' commands are directed to. It does not update the Function Select Register in the CCCR. eg. ready> io fn 0 <-- selects target of read/write as FN0 - CCCR ready> io w 0x10 0x00 <-- set Block Size of FN0 to 0x0200 ready> io w 0x11 0x02 ready> io fn 1 <-- selects target of read/write as FN1 - FBR1 ready> io w 0x10 0xff <-- set Block Size of FN1 to 0x0300 ready> io w 0x11 0x03 (l) io help This command displays help for all IO related commands. (m) io abort <0..7> This command has been implemented but has not be tested. It is equivalent to the 'STOP TRANSMISSION (CMD12)' command for SD Memory and MMC cards. It will abort the currently ongoing transfer operation of the specified Function. (n) decode cis This command decodes the previously read CIS. As there is only one CIS memory and subsequent 'io get cis' will overwrite the previously read CIS. Full CIS Tuple decode is *NOT* performed. (o) decode cccr This command performs a FULL decode of the CCCR register bits. (p) decode fbr This command performs a FULL decode of the FBR. There is only one FBR buffer in the program and a subsequent 'io get fbr' will overwrite the previous FBR contents. (q) dump cis This command performs a byte by byte dump of the current contents of the CIS buffer up to a maximum of 255 bytes. (s) dump cccr This command performs a byte by byte dump of the current contents of the CCCR buffer up to a maximum of 255 bytes. (t) dump fbr This command performs a byte by byte dump of the current contents of the FBR buffer up to a maximum of 255 bytes. [end] SDHC_R316_09Dec04 (Sreedharan Bhaskaran, sreeb@solomon-systech.com) ------------------------------------------------------------------- What's new ---------- 1. MMC Initialisation This release has MMC Initialisation code. During initialisation, sdhc will attempt to initialise an SD Memory card, failing which it will attempt MMC initialisation. 2. irq By default, the interrupt signal enable registers are turned off. If 'irq on' is used, then the interrupt signal enable registers are not touched and will retain any previous value set via a SLC. 3. autoreset <[on]|off> This controls autoreset in batch and script mode only. If autoreset is off, then internal 'reset data' and 'reset cmd' is not issued when sdhc encounters read or write data failures. If autoreset is on, then reset is done automatically. 4. dump fifo <0|1> This command enables readback of fifo 0 or fifo 1 and allows inspection of data in the fifo. This also enables the data recovery for the CJS Use Case. Look at fifo_readback() in sdreg.c to enable fifo readback mode. [end] SDHC_R315_03Dec04 (Sreedharan Bhaskaran, sreeb@solomon-systech.com) ------------------------------------------------------------------- This release has not been tested on sdhc_r3.15 because the bitfiles from HKG for the 8K board have not been received and the 3K bitfile is not ready. There is a minor change made in this release to facilitate interrupt testing which is only available on the 8K board because of amazon top-level connections. New command: a. irq If irq is set to on, then the SDHC interrupt signal will be routed to the main interrupt controller. Default for irq is off, since sdhc works in poll mode. [end] SDHC_R314_10Nov04 (Sreedharan Bhaskaran, sreeb@solomon-systech.com) ----------------------------------------------------------------- This release has been tested on the XC2V3000 platform using MX1 and with input clock of 25MHz. The following changes have been made: 1. -b command line switch The -b command line switch enables sdhc to detect that it is being executed in batch mode. In batch mode, any read and write data failures will cause a 'reset data' and 'reset cmd' to be issued automatically. This allows error recovery in batch mode. 2. read_cli() and write_cli() These functions have been modified to detect if read_data() and write_data(0 return a failure code of -1. If a failure code of -1 is returned when sdhc is being run in batch mode, then a data followed by cmd reset is performed. 3. send_cmd() The send_cmd() will sometimes erroneously report that PSR_INHIBIT_CMD is not set after the CMD register has been written to. This happens because the OS takes away the timeslice from the sdhc program by which time the CMD has completed and the PSR_INHIBIT_CMD bit has toggled from 0 -> 1 -> 0. This change is missed and a false positive is announced by send_cmd(). send_cmd() has not been modified and if PSR_INHIBIT_CMD is not set and INTR_CMD_COMPLETE is set, then no error is flagged. 4. reg_test () Register RW Test has been cleaned up to prevent reporting false failures. [end] SDHC_R313a_1Nov04 (Sreedharan Bhaskaran, sreeb@solomon-systech.com) ----------------------------------------------------------------------- This is a minor release for sdhc_r313 test software. It fixes 1 bug introduced in sdhc_erase() in sdhc_r312pre10 test & debug for erase.scr. sdhc_erase() has been updated - removed a redundant check for INTR_DAT_COMPLETE. SDHC_R313_29Oct04 (Sreedharan Bhaskaran, sreeb@solomon-systech.com) ----------------------------------------------------------------------- This release is a name change of sdhc_r312pre10 to sdhc_r313. SDHC_R312pre10_29Oct04 (Sreedharan Bhaskaran, sreeb@solomon-systech.com) ----------------------------------------------------------------------- Some minor command line changes have been added for better scripting support 1. A '-q' command line option has been added. When this option is used, the sdhc test program will not execute its initialisation routine and will jump to the sdhc cli immediately. 2. echo command has been improved. Syntax: echo <[on]|off|stringtext> echo on - turns on command echo echo off - turns off command echo echo - echoes regardless of echo setting 3. scripting support improvements a. '//' can be used in a script. Any line beginning with a '//' will be ignored. This is useful for commenting script file ... ...

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