synplifypro[1].zip - This course introduces the new user to the SynplifyPro™ FPGA synthesis product. The topics covered will include:,2011-09-20 10:24:53,下载3次
vlsi_script0607.zip - RTL Design Guideline E-Book,2011-09-20 10:23:42,下载2次
FPD87392AXA.zip - LCD Timing Controller data sheet,2011-09-20 10:20:27,下载4次
HM10S604.zip - Hynix LCD Controller Data Sheet,2011-09-20 10:19:02,下载3次
LCD-Techniques-and-Circuits(1).zip - LCD Techniques and Circuits E-book,2011-09-20 10:17:38,下载5次
M25P32_VG_12_50MHZ.zip - Serail Nor Flash Memory Model,2009-12-10 15:25:26,下载103次
spartan6_hdl.zip - Xilinx Spartan6 library reference.,2009-12-10 15:24:10,下载46次
spartan3a_hdl.zip - Xilinx Spartan3E library reference.,2009-12-10 15:22:53,下载8次
spartan3_hdl.zip - Xilinx Spartan3 library reference.,2009-12-10 15:22:08,下载8次
sccb.zip - Omnivision SCCB interface verilog model,2009-12-10 15:19:17,下载183次
spi_slave.zip - SPI slave source code,2009-08-27 08:55:25,下载38次
mode.zip - modulus rtl code and synthesis example files,2009-08-27 08:51:09,下载6次
Q8051.zip - Q8051 source code and test bench files,2009-08-27 08:49:00,下载29次
udev_um.zip - USB 2.0 device core datasheet form www.asics.ws,2009-08-27 08:43:47,下载3次
udev_brief.zip - USB 2.0 device core bruef data sheet form www.asics.ws,2009-08-27 08:42:43,下载4次
timer_rtl_source.zip - Timer verilog RTL code,2009-07-28 08:33:10,下载18次
watch_dog_rtl_source.zip - Watchdog timer verilog RTL code,2009-07-28 08:31:00,下载67次
bmp_ycbcr.zip - File change from BMP to hex yc file.,2009-07-28 08:28:36,下载11次
DP8051SPEC.zip - DP8051 Specification. Datasheet.,2009-07-28 08:26:41,下载11次
S12SPIV3.zip - SPI design reference document.,2009-07-28 08:19:57,下载2次
logDSP.zip - DSP study examole and introduction,2009-05-21 21:44:02,下载1次