thsutikno

积分:537
上传文件:7
下载次数:5
注册日期:2011-06-01 16:36:27

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3813412-Matlab-Simulink-Simulink-Matlab-to-Vhdl.r - Simulink/Matlab-to-VHDL Route for Full-Custom/FPGA Rapid Prototyping of DSP Algorithms,2011-06-01 17:10:03,下载16次
1342563-IEEE-Standard-for-VHDL-Register-Transfer- - 1076.6TM IEEE Standard for VHDL Register Transfer Level (RTL) Synthesis,2011-06-01 17:08:43,下载3次
836335-IEEE-Standard-for-VHDL-Register-Transfer-L - IEEE Standard for VHDL Register Transfer Level (RTL) Synthesis,2011-06-01 17:07:43,下载2次
sqrt32.rar - sqrt32.vhdl unsigned integer sqrt 32-bits computing unsigned integer ,2011-06-01 17:03:40,下载12次
Vhdl1.rar - calculating of iD & iQ, with ia & ib in 2 s complement,2011-06-01 17:02:14,下载9次
triangle.rar - To generate triangle waveform,2011-06-01 17:00:28,下载4次
FPGA-based-Torque-and-Flux-Estimator-_IREE.rar - This paper presents a new design of the torque and stator flux estimators for Direct Torque control (DTC) for Field Programmable Gate Array (FPGA) implementation, which permit very fast calculations. An alternative variable word-size approach in two’s complement fixedpoint format is used for the implementation, in order to minimize calculation errors and the hardware resource usage. The simulation results of DTC model in Matlab, which performed double-precision calculations, are used as references to digital computations executed in FPGA implementation. The Hardware-in-the-loop (HIL) method is used to verify the minimal error between Matlab simulation and the experimental results, and thus the well-functionality of the implemented estimators.,2011-06-01 16:40:29,下载20次

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