Abdelazeem

积分:233
上传文件:1
下载次数:13
注册日期:2020-10-29 05:12:14

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verilog-ethernet.zip - Collection of Ethernet-related components for gigabit, 10G, and 25G packet processing (8 bit and 64 bit datapaths). Includes modules for handling Ethernet frames as well as IP, UDP, and ARP and the components for constructing a complete UDP/IP stack. Includes MAC modules for gigabit and 10G/25G, a 10G/25G PCS/PMA PHY module, and a 10G/25G combination MAC/PCS/PMA module. Includes various PTP related components for implementing systems that require precise time synchronization. Also includes full MyHDL testbench with intelligent bus cosimulation endpoints.,2020-10-29 05:25:36,下载6次

近期下载
Antenna-Theory-a-Design-3rd-Ed.---Balanis-Matlab- - ALL MATLAB CODES RELATED TO ANTENNA
AMBA-Bus_Verilog_Model.zip - AMBA-Bus_Verilog_Model with ahb and apb
LIBS_130nm.rar - TSMC 130NM的DESIGN LIBRARY。
TSMC.zip - TCBN65LPBWP7T VERSION 200A tsmc CLN65LP : 65nm CMOS LOGIC Low Power
Synopsys_90nm_lib_course-OpenSPARC.rar - 开源可扩充处理器架构.源代码Synopsys_90nm_lib_course-OpenSPARC_labs_final_041509
tclug.zip - Synopsys TCL User Guide
asic_scrip_taiwan.rar - 台湾中山大学ASIC实验室综合脚本教程,对学习,编写ASIC综合脚本有很大帮助哈。
tcoug.zip - Synopsys Timing Constraint User Guide
OSU_FreePDK.tar.gz - This is FreePDK foundry PDK osu, you can use this PDK free for any foundry without NDA.
TSMC 65nm 工艺库.zip - TSMC 65nm 工艺库 可用于spice仿真模型

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