fpga_fifo_0122_02
所属分类：中间件编程
开发工具：VHDL
文件大小：2268KB
下载次数：319
上传日期：2008-05-22 14:57:32
上 传 者：
管理员
说明： 可以在里面修改协议.主要是cmos---fpga--usb(68013a)中除68013a部分的程序
(To amend the agreement in the inside. Mainly cmos-fpga usb (68013a), except part of the procedure 68013a)
文件列表:
fpga_fifo_0122_02\smartgen\clk_pll\clk_pll.cxf (1658, 2008-01-22)
fpga_fifo_0122_02\smartgen\clk_pll\clk_pll.gen (650, 2008-01-22)
fpga_fifo_0122_02\smartgen\clk_pll\clk_pll.log (2534, 2008-01-22)
fpga_fifo_0122_02\smartgen\clk_pll\clk_pll.v (2671, 2008-01-22)
fpga_fifo_0122_02\smartgen\clk_pll (0, 2008-01-22)
fpga_fifo_0122_02\smartgen\clk_pll_work.ixf (1205, 2008-01-22)
fpga_fifo_0122_02\smartgen\fifo_fpga\fifo_fpga.shx (0, 2008-01-10)
fpga_fifo_0122_02\smartgen\fifo_fpga\fifo_fpga_R0C0.mem (5632, 2008-01-10)
fpga_fifo_0122_02\smartgen\fifo_fpga\fifo_fpga_R1C0.mem (5632, 2008-01-10)
fpga_fifo_0122_02\smartgen\fifo_fpga\fifo_fpga_R2C0.mem (2816, 2008-01-10)
fpga_fifo_0122_02\smartgen\fifo_fpga (0, 2008-01-10)
fpga_fifo_0122_02\smartgen\fifo_fpga1280x8\fifo_fpga1280x8.cxf (2156, 2008-01-17)
fpga_fifo_0122_02\smartgen\fifo_fpga1280x8\fifo_fpga1280x8.gen (924, 2008-01-17)
fpga_fifo_0122_02\smartgen\fifo_fpga1280x8\fifo_fpga1280x8.log (3147, 2008-01-17)
fpga_fifo_0122_02\smartgen\fifo_fpga1280x8\fifo_fpga1280x8.v (84642, 2008-01-17)
fpga_fifo_0122_02\smartgen\fifo_fpga1280x8 (0, 2008-01-17)
fpga_fifo_0122_02\smartgen\fifo_fpga1280x8_work.ixf (1702, 2008-01-17)
fpga_fifo_0122_02\smartgen\smartgen.aws (440, 2008-05-16)
fpga_fifo_0122_02\smartgen (0, 2008-01-22)
fpga_fifo_0122_02\stimulus\BtimErrors.log (20, 2008-01-11)
fpga_fifo_0122_02\stimulus\ctr_data_tb.v (2204, 2008-01-18)
fpga_fifo_0122_02\stimulus\ctr_data_tb.v.bak (2534, 2008-01-11)
fpga_fifo_0122_02\stimulus\files_to_build.txt (40, 2008-01-11)
fpga_fifo_0122_02\stimulus\fpga_core.dsk (843, 2008-01-11)
fpga_fifo_0122_02\stimulus\fpga_core.hpj (920, 2008-01-11)
fpga_fifo_0122_02\stimulus\fpga_core_tb.v (56897, 2008-01-22)
fpga_fifo_0122_02\stimulus\fpga_core_tb.v.bak (56927, 2008-01-21)
fpga_fifo_0122_02\stimulus\waveperl.log (0, 2008-01-11)
fpga_fifo_0122_02\stimulus\fifo_fpga_1280x8_tb.v (8683, 2008-05-07)
fpga_fifo_0122_02\stimulus (0, 2008-01-22)
fpga_fifo_0122_02\synthesis\backup\fpga_core.srr (1289, 2008-01-17)
fpga_fifo_0122_02\synthesis\backup (0, 2008-01-17)
fpga_fifo_0122_02\synthesis\fpga_core.areasrr (5399, 2008-05-07)
fpga_fifo_0122_02\synthesis\fpga_core.edn (369741, 2008-05-07)
fpga_fifo_0122_02\synthesis\fpga_core.map (0, 2008-05-07)
fpga_fifo_0122_02\synthesis\fpga_core.sdf (523446, 2008-05-07)
fpga_fifo_0122_02\synthesis\fpga_core.srd (177887, 2008-05-07)
fpga_fifo_0122_02\synthesis\fpga_core.srm (482719, 2008-05-07)
fpga_fifo_0122_02\synthesis\fpga_core.srr (103813, 2008-05-07)
fpga_fifo_0122_02\synthesis\fpga_core.tlg (15732, 2008-05-07)
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