文件列表:

双极性pwm\双极性SPWM\ADC.c (3934, 2010-01-13)
双极性pwm\双极性SPWM\adc.h (739, 2010-01-14)
双极性pwm\双极性SPWM\CMSIS\Core\CM3\core_cm3.c (17206, 2009-06-23)
双极性pwm\双极性SPWM\CMSIS\Core\CM3\core_cm3.h (46533, 2009-06-23)
双极性pwm\双极性SPWM\CMSIS\Core\CM3\startup\arm\startup_stm32f10x_cl.s (15600, 2009-06-23)
双极性pwm\双极性SPWM\CMSIS\Core\CM3\startup\arm\startup_stm32f10x_hd.s (15872, 2009-06-23)
双极性pwm\双极性SPWM\CMSIS\Core\CM3\startup\arm\startup_stm32f10x_ld.s (12164, 2009-06-23)
双极性pwm\双极性SPWM\CMSIS\Core\CM3\startup\arm\startup_stm32f10x_md.s (12564, 2009-06-23)
双极性pwm\双极性SPWM\CMSIS\Core\CM3\startup\gcc\startup_stm32f10x_cl.s (12531, 2009-06-23)
双极性pwm\双极性SPWM\CMSIS\Core\CM3\startup\gcc\startup_stm32f10x_hd.c (16437, 2009-04-06)
双极性pwm\双极性SPWM\CMSIS\Core\CM3\startup\gcc\startup_stm32f10x_hd.s (13007, 2009-06-23)
双极性pwm\双极性SPWM\CMSIS\Core\CM3\startup\gcc\startup_stm32f10x_ld.c (12790, 2009-04-06)
双极性pwm\双极性SPWM\CMSIS\Core\CM3\startup\gcc\startup_stm32f10x_ld.s (9505, 2009-06-23)
双极性pwm\双极性SPWM\CMSIS\Core\CM3\startup\gcc\startup_stm32f10x_md.c (13104, 2009-04-06)
双极性pwm\双极性SPWM\CMSIS\Core\CM3\startup\gcc\startup_stm32f10x_md.s (9994, 2009-06-23)
双极性pwm\双极性SPWM\CMSIS\Core\CM3\startup\iar\startup_stm32f10x_cl.s (16309, 2009-06-23)
双极性pwm\双极性SPWM\CMSIS\Core\CM3\startup\iar\startup_stm32f10x_hd.s (16709, 2009-06-23)
双极性pwm\双极性SPWM\CMSIS\Core\CM3\startup\iar\startup_stm32f10x_ld.s (12333, 2009-06-23)
双极性pwm\双极性SPWM\CMSIS\Core\CM3\startup\iar\startup_stm32f10x_md.s (12594, 2009-06-23)
双极性pwm\双极性SPWM\CMSIS\Core\CM3\stm32f10x.h (593385, 2009-06-23)
双极性pwm\双极性SPWM\CMSIS\Core\CM3\system_stm32f10x.c (30616, 2009-06-23)
双极性pwm\双极性SPWM\CMSIS\Core\CM3\system_stm32f10x.h (2404, 2009-06-23)
双极性pwm\双极性SPWM\CMSIS\Core\Documentation\CMSIS_Core.htm (52463, 2009-06-23)
双极性pwm\双极性SPWM\CMSIS\License.doc (39936, 2009-06-23)
双极性pwm\双极性SPWM\cortexm3_macro.lst (25825, 2010-04-09)
双极性pwm\双极性SPWM\cortexm3_macro.s (10308, 2008-09-21)
双极性pwm\双极性SPWM\JLinkArm_Target 1.ini (205, 2009-09-03)
双极性pwm\双极性SPWM\main.c (5064, 2010-04-09)
双极性pwm\双极性SPWM\output\adc.crf (149233, 2010-04-09)
双极性pwm\双极性SPWM\output\adc.d (1803, 2010-04-09)
双极性pwm\双极性SPWM\output\adc.o (173804, 2010-04-09)
双极性pwm\双极性SPWM\output\core_cm3.crf (3536, 2009-12-31)
双极性pwm\双极性SPWM\output\core_cm3.d (100, 2009-12-31)
双极性pwm\双极性SPWM\output\core_cm3.o (9776, 2009-12-31)
双极性pwm\双极性SPWM\output\core_cm3.__i (198, 2009-12-31)
双极性pwm\双极性SPWM\output\cortexm3_macro.o (2400, 2010-04-09)
双极性pwm\双极性SPWM\output\ExtDll.iex (19, 2010-04-09)
双极性pwm\双极性SPWM\output\main.crf (155496, 2010-04-09)
双极性pwm\双极性SPWM\output\main.d (1856, 2010-04-09)
双极性pwm\双极性SPWM\output\main.o (177984, 2010-04-09)
... ...

/******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** * File Name : readme.txt * Author : MCD Application Team * Version : V2.0.3 * Date : 09/22/2008 * Description : Description of the TIM 7PWM_Output example. ******************************************************************************** * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. *******************************************************************************/ Example description =================== This example shows how to configure the TIM1 peripheral to generate 7 PWM signals with 4 different duty cycles. TIM1CLK is fixed to 72 MHz, the TIM1 Prescaler is equal to 0 so the TIM1 counter clock used is 72 MHz. TIM1 frequency is defined as follow: TIM1 frequency = TIM1CLK/(TIM1_Period + 1) = 17.57 KHz. The TIM1 CCR1 register value is equal to 0x7FF, so the TIM1 Channel 1 and TIM1 Channel 1N generate a PWM signal with a frequency equal to 17.57 KHz and a duty cycle equal to: TIM1 Channel1 duty cycle = TIM1_CCR1 /( TIM1_Period + 1) = 50%. The TIM1 CCR2 register value is equal to 0x5FF, so the TIM1 Channel 2 and TIM1 Channel 2N generate a PWM signal with a frequency equal to 17.57 KHz and a duty cycle equal to: TIM1 Channel2 duty cycle = TIM1_CCR2 / ( TIM1_Period + 1)= 37.5%. The TIM1 CCR3 register value is equal to 0x3FF, so the TIM1 Channel 3 and TIM1 Channel 3N generate a PWM signal with a frequency equal to 17.57 KHz and a duty cycle equal to: TIM1 Channel3 duty cycle = TIM1_CCR3 / ( TIM1_Period + 1) = 25%. The TIM1 CCR4 register value is equal to 0x1FF, so the TIM1 Channel 4 generate a PWM signal with a frequency equal to 17.57 KHz and a duty cycle equal to: TIM1 Channel4 duty cycle = TIM1_CCR4 / ( TIM1_Period + 1) = 12.5%. The TIM1 waveform can be displayed using an oscilloscope. Directory contents ================== stm32f10x_conf.h Library Configuration file stm32f10x_it.c Interrupt handlers stm32f10x_it.h Interrupt handlers header file main.c Main program Hardware environment ==================== This example runs on STMicroelectronics STM3210B-EVAL and STM3210E-EVAL evaluation boards and can be easily tailored to any other hardware. Connect the TIM1 pins to an oscilloscope to monitor the different waveforms: - TIM1_CH1 pin (PA.08) - TIM1_CH1N pin (PB.13) - TIM1_CH2 pin (PA.09) - TIM1_CH2N pin (PB.14) - TIM1_CH3 pin (PA.10) - TIM1_CH3N pin (PB.15) - TIM1_CH4 pin (PA.11) How to use it ============= In order to make the program work, you must do the following: - Create a project and setup all your toolchain's start-up files - Compile the directory content files and required Library files: + stm32f10x_lib.c + stm32f10x_tim.c + stm32f10x_gpio.c + stm32f10x_rcc.c + stm32f10x_nvic.c + stm32f10x_flash.c - Link all compiled files and load your image into target memory - Run the example ******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE******

近期下载者：

相关文件：

评论：[我要评论] [举报此文件]

收藏者：