CD1_MT9D001_DISPALY_SAVE
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：3208KB
下载次数：21
上传日期：2013-05-14 19:37:41
上 传 者：
dixia
说明： 基于FPGA的CMOS图像传感器（MT9D00）显示并保存图像
(FPGA-based CMOS image sensor (MT9D00) and save the image)
文件列表:
CD1_MT9D001_DISPALY_SAVE (0, 2012-04-24)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE (0, 2012-07-14)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\.sopc_builder (0, 2012-04-24)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\.sopc_builder\install.ptf (12161, 2012-04-24)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\.sopc_builder\install2.ptf (5450, 2012-04-24)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\.sopc_builder\preferences.xml (588, 2012-04-24)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\Line_Buffer.qip (0, 2012-04-25)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\MT9D001_DISP_SAVE.asm.rpt (7592, 2012-07-14)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\MT9D001_DISP_SAVE.cdf (364, 2012-07-14)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\MT9D001_DISP_SAVE.done (26, 2012-07-14)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\MT9D001_DISP_SAVE.dpf (239, 2012-04-25)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\MT9D001_DISP_SAVE.eda.rpt (2712, 2012-04-25)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\MT9D001_DISP_SAVE.fit.rpt (924001, 2012-07-14)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\MT9D001_DISP_SAVE.fit.smsg (513, 2012-07-14)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\MT9D001_DISP_SAVE.fit.summary (641, 2012-07-14)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\MT9D001_DISP_SAVE.flow.rpt (10399, 2012-07-14)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\MT9D001_DISP_SAVE.jdi (21, 2012-07-14)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\MT9D001_DISP_SAVE.map.rpt (357688, 2012-07-14)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\MT9D001_DISP_SAVE.map.smsg (229, 2012-07-14)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\MT9D001_DISP_SAVE.map.summary (609, 2012-07-14)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\MT9D001_DISP_SAVE.pin (57908, 2012-07-14)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\MT9D001_DISP_SAVE.qpf (918, 2012-04-24)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\MT9D001_DISP_SAVE.qsf (20483, 2012-07-14)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\MT9D001_DISP_SAVE.qsf.bak (19815, 2012-07-14)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\MT9D001_DISP_SAVE.qws (1065, 2012-04-24)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\MT9D001_DISP_SAVE.sof (496530, 2012-07-14)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\MT9D001_DISP_SAVE.sta.rpt (3621419, 2012-07-14)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\MT9D001_DISP_SAVE.sta.summary (7282, 2012-07-14)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\MT9D001_DISP_SAVE_assignment_defaults.qdf (48717, 2012-04-24)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\NIOS.bsf (2984, 2012-04-24)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\NIOS.ptf (63620, 2012-04-24)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\NIOS.ptf.8.0 (32110, 2012-04-24)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\NIOS.ptf.bak (53268, 2012-04-24)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\NIOS.ptf.pre_generation_ptf (32110, 2012-04-24)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\NIOS.qip (165, 2012-04-24)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\NIOS.sopc (9860, 2012-04-24)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\NIOS.sopcinfo (98930, 2012-04-24)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\NIOS.v (169314, 2012-04-24)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\NIOS_generation_script (6101, 2012-04-24)
CD1_MT9D001_DISPALY_SAVE\FPGA_CODE\NIOS_log.txt (4206, 2012-04-24)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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