16QAM
所属分类：单片机开发
开发工具：VHDL
文件大小：503KB
下载次数：13
上传日期：2013-12-27 10:01:48
上 传 者：
arbiter527
说明： QAM调制模块，可用于Quartus仿真与fpga硬件实现。
(QAM Modulation Mode, can be used for Quartus simulation and FPGA.)
文件列表:
16QAM(verilog)\BPSKsend.asm.rpt (7309, 2013-04-23)
16QAM(verilog)\BPSKsend.bdf (13930, 2013-04-23)
16QAM(verilog)\BPSKsend.bsf (4133, 2012-10-09)
16QAM(verilog)\BPSKsend.cdf (313, 2012-10-23)
16QAM(verilog)\BPSKsend.done (26, 2013-12-18)
16QAM(verilog)\BPSKsend.dpf (239, 2012-10-23)
16QAM(verilog)\BPSKsend.fit.rpt (209660, 2013-04-23)
16QAM(verilog)\BPSKsend.fit.smsg (513, 2013-04-23)
16QAM(verilog)\BPSKsend.fit.summary (613, 2013-04-23)
16QAM(verilog)\BPSKsend.flow.rpt (9670, 2013-04-23)
16QAM(verilog)\BPSKsend.map.rpt (92538, 2013-04-23)
16QAM(verilog)\BPSKsend.map.smsg (135, 2013-04-23)
16QAM(verilog)\BPSKsend.map.summary (465, 2013-04-23)
16QAM(verilog)\BPSKsend.pin (31130, 2013-04-23)
16QAM(verilog)\BPSKsend.qpf (1272, 2012-09-25)
16QAM(verilog)\BPSKsend.qsf (4384, 2013-12-18)
16QAM(verilog)\BPSKsend.qws (2120, 2013-12-18)
16QAM(verilog)\BPSKsend.sim.rpt (83252, 2013-04-23)
16QAM(verilog)\BPSKsend.sof (703624, 2013-04-23)
16QAM(verilog)\BPSKsend.sta.rpt (253653, 2013-04-23)
16QAM(verilog)\BPSKsend.sta.summary (1414, 2013-04-23)
16QAM(verilog)\BPSKsend.vwf (1329438, 2013-04-23)
16QAM(verilog)\BPSKsend_assignment_defaults.qdf (47441, 2013-12-18)
16QAM(verilog)\DAC_out.bsf (1986, 2012-09-25)
16QAM(verilog)\DAC_out.v (173, 2012-09-25)
16QAM(verilog)\DAC_out.v.bak (167, 2012-09-25)
16QAM(verilog)\db\altsyncram_ag91.tdf (9539, 2012-09-25)
16QAM(verilog)\db\altsyncram_sc91.tdf (9530, 2012-09-25)
16QAM(verilog)\db\BPSKsend.analyze_file.qmsg (2212, 2013-12-18)
16QAM(verilog)\db\BPSKsend.db_info (137, 2013-12-18)
16QAM(verilog)\db\BPSKsend.eco.cdb (161, 2013-12-18)
16QAM(verilog)\db\BPSKsend.eda.qmsg (2305, 2013-12-18)
16QAM(verilog)\db\BPSKsend.sim.cvwf (12835, 2013-04-23)
16QAM(verilog)\db\BPSKsend.sld_design_entry.sci (200, 2013-12-18)
16QAM(verilog)\db\BPSKsend_global_asgn_op.abo (252657, 2013-04-23)
16QAM(verilog)\db\PLL_280_altpll.v (3335, 2012-09-25)
16QAM(verilog)\db\prev_cmp_BPSKsend.asm.qmsg (2198, 2013-04-23)
16QAM(verilog)\db\prev_cmp_BPSKsend.fit.qmsg (75305, 2013-04-23)
16QAM(verilog)\db\prev_cmp_BPSKsend.map.qmsg (35854, 2013-04-23)
16QAM(verilog)\db\prev_cmp_BPSKsend.qmsg (2212, 2013-12-18)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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