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um-sst39VF160 norflash驱动源码
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<html xmlns="http://www.w3.org/1999/xhtml"> <head> <meta charset="utf-8"> <meta name="generator" content="pdf2htmlEX"> <meta http-equiv="X-UA-Compatible" content="IE=edge,chrome=1"> <link rel="stylesheet" href="https://static.pudn.com/base/css/base.min.css"> <link rel="stylesheet" href="https://static.pudn.com/base/css/fancy.min.css"> <link rel="stylesheet" href="https://static.pudn.com/prod/directory_preview_static/6257df0560196e4b84c2a688/raw.css"> <script src="https://static.pudn.com/base/js/compatibility.min.js"></script> <script src="https://static.pudn.com/base/js/pdf2htmlEX.min.js"></script> <script> try{ pdf2htmlEX.defaultViewer = new pdf2htmlEX.Viewer({}); }catch(e){} </script> <title></title> </head> <body> <div id="sidebar" style="display: none"> <div id="outline"> </div> </div> <div id="pf1" class="pf w0 h0" data-page-no="1"><div class="pc pc1 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/6257df0560196e4b84c2a688/bg1.jpg"><div class="t m0 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0">Data S<span class="_ _0"></span>heet</div><div class="t m0 x2 h3 y2 ff2 fs1 fc0 sc0 ls1 ws1">&#169;<span class="_ _0"></span>2002 S<span class="_ _0"></span>ilicon Storage Technology, Inc.</div><div class="t m0 x2 h3 y3 ff2 fs1 fc0 sc0 ls2 ws2">S71145-0<span class="_ _1"></span>2-000<span class="_ _2"> </span>2/02<span class="_ _3"> </span>399</div><div class="t m0 x2 h3 y4 ff2 fs1 fc1 sc0 ls3 ws2">1</div><div class="t m0 x3 h3 y2 ff2 fs1 fc0 sc0 ls4 ws3">The SST logo an<span class="_ _1"></span>d SuperFlash are r<span class="_ _1"></span>egistered tra<span class="_ _1"></span>demarks of Silicon Storage T<span class="_ _4"></span>echnology<span class="_ _4"></span>, Inc.</div><div class="t m0 x4 h3 y3 ff2 fs1 fc0 sc0 ls5 ws4">Multi-Purpose Flash and MPF are trademarks of Silicon Storage T<span class="_ _5"></span>echnology<span class="_ _5"></span>, Inc.</div><div class="t m0 x5 h3 y4 ff2 fs1 fc0 sc0 ls6 ws5">These specif<span class="_ _1"></span>ications are sub<span class="_ _1"></span>ject to change with<span class="_ _1"></span>out notice.</div><div class="t m0 x6 h4 y5 ff3 fs2 fc0 sc0 ls7 ws2">16 Mbit<span class="_ _6"> </span>(x16)<span class="_ _6"> </span>Multi-Purpose Flash</div><div class="t m0 x7 h5 y6 ff3 fs3 fc0 sc0 ls3 ws6">SST39LF160 / SST39VF160</div><div class="t m0 x2 h5 y7 ff3 fs3 fc0 sc0 ls8 ws2">FEATURES:</div><div class="t m0 x2 h2 y8 ff3 fs0 fc0 sc0 ls9 ws7">&#8226;<span class="_ _7"> </span>Organized<span class="_ _0"></span> as 1M x1<span class="_ _0"></span>6</div><div class="t m0 x2 h2 y9 ff3 fs0 fc0 sc0 lsa ws8">&#8226;<span class="_ _7"> </span>Single V<span class="_ _5"></span>ol<span class="_ _0"></span>tage Read an<span class="_ _0"></span>d Write Op<span class="_ _0"></span>eration<span class="_ _0"></span>s</div><div class="t m0 x8 h6 ya ff2 fs0 fc0 sc0 lsb ws9">&#8211;<span class="_ _8"> </span>3.0-3.6V<span class="_ _0"></span> f<span class="_ _1"></span>or SST<span class="_ _0"></span>39LF160</div><div class="t m0 x8 h6 yb ff2 fs0 fc0 sc0 lsb ws9">&#8211;<span class="_ _8"> </span>2.7-3.6V<span class="_ _0"></span> f<span class="_ _1"></span>or SST<span class="_ _0"></span>39VF160</div><div class="t m0 x2 h2 yc ff3 fs0 fc0 sc0 lsc wsa">&#8226;<span class="_ _7"> </span>Superior Rel<span class="_ _0"></span>iability</div><div class="t m0 x8 h6 yd ff2 fs0 fc0 sc0 lsd wsb">&#8211;<span class="_ _8"> </span>Endurance<span class="_ _0"></span>: 100,000 Cy<span class="_ _0"></span>cles (ty<span class="_ _0"></span>pical)</div><div class="t m0 x8 h6 ye ff2 fs0 fc0 sc0 lse wsc">&#8211;<span class="_ _8"> </span>Greater th<span class="_ _0"></span>an 100 years Data<span class="_ _0"></span> Retention</div><div class="t m0 x2 h2 yf ff3 fs0 fc0 sc0 lsf wsd">&#8226;<span class="_ _7"> </span>Low P<span class="_ _5"></span>ower Consumption</div><div class="t m0 x8 h6 y10 ff2 fs0 fc0 sc0 ls10 wse">&#8211;<span class="_ _8"> </span>Active Current: 15 mA (typical)</div><div class="t m0 x8 h6 y11 ff2 fs0 fc0 sc0 lse wsc">&#8211;<span class="_ _8"> </span>Standby Current<span class="_ _0"></span>: 4 &#181;A (typi<span class="_ _0"></span>cal)</div><div class="t m0 x8 h6 y12 ff2 fs0 fc0 sc0 lse wsc">&#8211;<span class="_ _8"> </span>A<span class="_ _1"></span>uto Low P<span class="_ _1"></span>ow<span class="_ _1"></span>er Mode<span class="_ _0"></span>: 4 &#181;A (typi<span class="_ _0"></span>cal)</div><div class="t m0 x2 h2 y13 ff3 fs0 fc0 sc0 lsd wsb">&#8226;<span class="_ _7"> </span>Sector-Erase<span class="_ _0"></span> Capabil<span class="_ _0"></span>ity</div><div class="t m0 x8 h6 y14 ff2 fs0 fc0 sc0 ls11 wsf">&#8211;<span class="_ _8"> </span>Uniform<span class="_ _0"></span> 2 KWord secto<span class="_ _0"></span>rs</div><div class="t m0 x2 h2 y15 ff3 fs0 fc0 sc0 ls12 ws10">&#8226;<span class="_ _7"> </span>Fast Read Access<span class="_ _0"></span> Time</div><div class="t m0 x8 h6 y16 ff2 fs0 fc0 sc0 ls13 ws11">&#8211;<span class="_ _8"> </span>55 ns f<span class="_ _1"></span>or SST39LF1<span class="_ _0"></span>60</div><div class="t m0 x8 h6 y17 ff2 fs0 fc0 sc0 ls14 ws12">&#8211;<span class="_ _8"> </span>70 and 90 ns f<span class="_ _1"></span>or SST39VF160</div><div class="t m0 x2 h2 y18 ff3 fs0 fc0 sc0 ls15 ws13">&#8226;<span class="_ _7"> </span>Latched Addr<span class="_ _0"></span>ess and Data</div><div class="t m0 x9 h2 y19 ff3 fs0 fc0 sc0 ls10 ws14">&#8226;<span class="_ _7"> </span>Fast Erase and<span class="_ _0"></span> W<span class="_ _1"></span>or<span class="_ _1"></span>d-Program</div><div class="t m0 xa h6 y1a ff2 fs0 fc0 sc0 ls15 ws13">&#8211;<span class="_ _8"> </span>Sector-Erase Tim<span class="_ _0"></span>e: 18 m<span class="_ _0"></span>s (typical)</div><div class="t m0 xa h6 y1b ff2 fs0 fc0 sc0 ls16 ws15">&#8211;<span class="_ _8"> </span>Blo<span class="_ _0"></span>ck-Eras<span class="_ _0"></span>e Ti<span class="_ _0"></span>me:<span class="_ _0"></span> 18 m<span class="_ _0"></span>s (t<span class="_ _0"></span>ypic<span class="_ _0"></span>al)</div><div class="t m0 xa h6 y1c ff2 fs0 fc0 sc0 ls13 ws16">&#8211;<span class="_ _8"> </span>Chip-Era<span class="_ _0"></span>se Time: 70<span class="_ _0"></span> ms (ty<span class="_ _0"></span>pical)</div><div class="t m0 xa h6 y1d ff2 fs0 fc0 sc0 ls13 ws9">&#8211;<span class="_ _8"> </span>W<span class="_ _1"></span>ord-P<span class="_ _0"></span>rogram Time: 1<span class="_ _0"></span>4 &#181;s (typic<span class="_ _0"></span>al)</div><div class="t m0 xa h6 y1e ff2 fs0 fc0 sc0 ls13 ws9">&#8211;<span class="_ _8"> </span>Chip Rewri<span class="_ _0"></span>te Time: <span class="_ _0"></span>15 seconds<span class="_ _0"></span> (typic<span class="_ _0"></span>al) for </div><div class="t m0 x4 h6 y1f ff2 fs0 fc0 sc0 ls17 ws2">SST39LF/VF160</div><div class="t m0 x9 h2 y20 ff3 fs0 fc0 sc0 ls18 ws17">&#8226;<span class="_ _7"> </span>A<span class="_ _1"></span>utomatic Write Timing</div><div class="t m0 xa h6 y21 ff2 fs0 fc0 sc0 ls9 ws7">&#8211;<span class="_ _8"> </span>Inter<span class="_ _0"></span>nal V</div><div class="t m0 xb h7 y22 ff2 fs4 fc0 sc0 ls19 ws2">PP</div><div class="t m0 xc h6 y23 ff2 fs0 fc0 sc0 ls13 ws16"> Generatio<span class="_ _0"></span>n</div><div class="t m0 x9 h2 y24 ff3 fs0 fc0 sc0 ls1a ws18">&#8226;<span class="_ _7"> </span>End-of-Wri<span class="_ _1"></span>te Detection</div><div class="t m0 xa h6 y25 ff2 fs0 fc0 sc0 ls1b ws19">&#8211;<span class="_ _8"> </span>T<span class="_ _4"></span>oggle Bit</div><div class="t m0 xa h6 y26 ff2 fs0 fc0 sc0 ls1c ws1a">&#8211;<span class="_ _8"> </span>Data# Polling</div><div class="t m0 x9 h2 y27 ff3 fs0 fc0 sc0 lsc wsa">&#8226;<span class="_ _7"> </span>CMOS I<span class="_ _0"></span>/O Compatibility </div><div class="t m0 x9 h2 y28 ff3 fs0 fc0 sc0 ls1d ws1b">&#8226;<span class="_ _7"> </span>JEDEC Sta<span class="_ _1"></span>ndard</div><div class="t m0 xa h6 y29 ff2 fs0 fc0 sc0 ls1e ws1c">&#8211;<span class="_ _8"> </span>Flash <span class="_ _0"></span>EEPROM Pino<span class="_ _0"></span>uts and c<span class="_ _0"></span>ommand s<span class="_ _0"></span>ets</div><div class="t m0 x9 h2 y2a ff3 fs0 fc0 sc0 ls1f ws1d">&#8226;<span class="_ _7"> </span>P<span class="_ _1"></span>ac<span class="_ _5"></span>kages A<span class="_ _5"></span>va<span class="_ _1"></span>ilab<span class="_ _1"></span>le</div><div class="t m0 xa h6 y2b ff2 fs0 fc0 sc0 ls10 ws14">&#8211;<span class="_ _8"> </span>48-lead<span class="_ _0"></span> TSOP (12mm<span class="_ _0"></span> x 20mm)</div><div class="t m0 xa h6 y2c ff2 fs0 fc0 sc0 ls20 ws1e">&#8211;<span class="_ _8"> </span>48-ball<span class="_ _0"></span> TFBGA<span class="_ _0"></span> (6mm x 8<span class="_ _0"></span>mm)</div><div class="t m0 x2 h5 y2d ff3 fs3 fc0 sc0 ls21 ws1f">PRODUCT DESCRIPTION</div><div class="t m0 x2 h6 y2e ff2 fs0 fc0 sc0 ls22 ws20">The SS<span class="_ _0"></span>T39L<span class="_ _0"></span>F/VF16<span class="_ _0"></span>0 devices <span class="_ _0"></span>are 1M x<span class="_ _0"></span>16 CMOS<span class="_ _0"></span> Mult<span class="_ _0"></span>i-</div><div class="t m0 x2 h6 y2f ff2 fs0 fc0 sc0 ls23 ws21">Pur<span class="_ _0"></span>p<span class="_ _0"></span>ose Flash (MP<span class="_ _0"></span>F) manufactured<span class="_ _0"></span> with SST&#8217;<span class="_ _1"></span>s propr<span class="_ _0"></span>ietar<span class="_ _0"></span>y<span class="_ _5"></span>,</div><div class="t m0 x2 h6 y30 ff2 fs0 fc0 sc0 ls24 ws22">high pe<span class="_ _0"></span>rf<span class="_ _1"></span>or<span class="_ _0"></span>man<span class="_ _0"></span>ce CMO<span class="_ _0"></span>S Supe<span class="_ _0"></span>rFlash <span class="_ _0"></span>technol<span class="_ _0"></span>og<span class="_ _1"></span>y<span class="_ _4"></span>. T<span class="_ _0"></span>he</div><div class="t m0 x2 h6 y31 ff2 fs0 fc0 sc0 ls25 ws23">split-<span class="_ _0"></span>gate<span class="_ _0"></span> cell <span class="_ _0"></span>design<span class="_ _0"></span> and<span class="_ _0"></span> thick <span class="_ _0"></span>oxide tunn<span class="_ _0"></span>elin<span class="_ _0"></span>g inje<span class="_ _0"></span>ctor</div><div class="t m0 x2 h6 y32 ff2 fs0 fc0 sc0 ls26 ws24">attain be<span class="_ _0"></span>tter rel<span class="_ _0"></span>iability<span class="_ _0"></span> and manufacturabili<span class="_ _0"></span>ty comp<span class="_ _0"></span>ared wit<span class="_ _0"></span>h</div><div class="t m0 x2 h6 y33 ff2 fs0 fc0 sc0 ls24 ws25">alter<span class="_ _0"></span>nate<span class="_ _0"></span> approac<span class="_ _0"></span>hes. The SS<span class="_ _0"></span>T39LF<span class="_ _0"></span>160 wr<span class="_ _0"></span>ite (Pr<span class="_ _0"></span>ogram or</div><div class="t m0 x2 h6 y34 ff2 fs0 fc0 sc0 ls27 ws26">Erase) wit<span class="_ _0"></span>h a 3.0-<span class="_ _0"></span>3.6V power su<span class="_ _0"></span>pply<span class="_ _4"></span>.<span class="_ _0"></span> The SST3<span class="_ _0"></span>9VF16<span class="_ _0"></span>0</div><div class="t m0 x2 h6 y35 ff2 fs0 fc0 sc0 ls24 ws27">wri<span class="_ _0"></span>te (Program or<span class="_ _0"></span> Erase) with<span class="_ _0"></span> a 2.7-3.<span class="_ _0"></span>6V power supply<span class="_ _5"></span>.</div><div class="t m0 x2 h6 y36 ff2 fs0 fc0 sc0 ls24 ws0">These devices c<span class="_ _0"></span>onform <span class="_ _0"></span>to JEDE<span class="_ _0"></span>C standa<span class="_ _0"></span>rd pino<span class="_ _0"></span>uts for x16</div><div class="t m0 x2 h6 y37 ff2 fs0 fc0 sc0 ls24 ws2">memor<span class="_ _0"></span>ies.</div><div class="t m0 x2 h6 y38 ff2 fs0 fc0 sc0 ls0 ws28">F<span class="_ _1"></span>eatur<span class="_ _0"></span>ing hig<span class="_ _0"></span>h performanc<span class="_ _0"></span>e Word-Program, the</div><div class="t m0 x2 h6 y39 ff2 fs0 fc0 sc0 ls28 ws29">SST39L<span class="_ _0"></span>F/VF16<span class="_ _0"></span>0 de<span class="_ _1"></span>vices<span class="_ _0"></span> provide a typ<span class="_ _0"></span>ical Word-Pro-</div><div class="t m0 x2 h6 y3a ff2 fs0 fc0 sc0 ls0 ws0">gram time of 1<span class="_ _0"></span>4 &#181;sec. Th<span class="_ _0"></span>ese devices use T<span class="_ _4"></span>oggle B<span class="_ _0"></span>it or</div><div class="t m0 x2 h6 y3b ff2 fs0 fc0 sc0 ls13 ws2a">Data# P<span class="_ _1"></span>olling to indi<span class="_ _0"></span>cate the comp<span class="_ _0"></span>letion<span class="_ _0"></span> of Program</div><div class="t m0 x2 h6 y3c ff2 fs0 fc0 sc0 ls9 ws2b">operation. T<span class="_ _4"></span>o protec<span class="_ _0"></span>t agains<span class="_ _0"></span>t inadver<span class="_ _0"></span>tent wr<span class="_ _0"></span>ite, they</div><div class="t m0 x2 h6 y3d ff2 fs0 fc0 sc0 ls9 ws2c">hav<span class="_ _1"></span>e on-chip ha<span class="_ _0"></span>rdware and S<span class="_ _0"></span>oftware Data P<span class="_ _0"></span>rotectio<span class="_ _0"></span>n</div><div class="t m0 x2 h6 y3e ff2 fs0 fc0 sc0 lsb ws2d">schemes. Des<span class="_ _0"></span>igned, ma<span class="_ _0"></span>nuf<span class="_ _1"></span>acture<span class="_ _0"></span>d, and teste<span class="_ _0"></span>d for a</div><div class="t m0 x2 h6 y3f ff2 fs0 fc0 sc0 ls11 ws2e">wide spe<span class="_ _0"></span>ctru<span class="_ _0"></span>m of a<span class="_ _0"></span>pplic<span class="_ _0"></span>ations, thes<span class="_ _0"></span>e devices ar<span class="_ _0"></span>e</div><div class="t m0 x2 h6 y40 ff2 fs0 fc0 sc0 ls13 ws16">offered with a guaranteed en<span class="_ _0"></span>durance of 10,00<span class="_ _0"></span>0 cycles.</div><div class="t m0 x2 h6 y41 ff2 fs0 fc0 sc0 ls0 ws0">Data reten<span class="_ _0"></span>tion is rated <span class="_ _0"></span>at greater th<span class="_ _0"></span>an 100 years.</div><div class="t m0 x2 h6 y42 ff2 fs0 fc0 sc0 ls29 ws2f">The SS<span class="_ _0"></span>T39LF<span class="_ _0"></span>/VF16<span class="_ _0"></span>0 devices ar<span class="_ _0"></span>e suit<span class="_ _0"></span>ed for applic<span class="_ _0"></span>atio<span class="_ _0"></span>ns</div><div class="t m0 x2 h6 y43 ff2 fs0 fc0 sc0 ls2a ws30">that req<span class="_ _0"></span>uire convenient an<span class="_ _0"></span>d econo<span class="_ _0"></span>mical upd<span class="_ _0"></span>ating of <span class="_ _0"></span>pro-</div><div class="t m0 x2 h6 y44 ff2 fs0 fc0 sc0 ls2b ws31">gr<span class="_ _1"></span>am,<span class="_ _1"></span> configur<span class="_ _1"></span>at<span class="_ _1"></span>ion, or<span class="_ _1"></span> data me<span class="_ _1"></span>mory<span class="_ _4"></span>. Fo<span class="_ _1"></span>r all syst<span class="_ _1"></span>em app<span class="_ _1"></span>li-</div><div class="t m0 x2 h6 y45 ff2 fs0 fc0 sc0 ls2c ws32">cations, th<span class="_ _0"></span>ey signif<span class="_ _0"></span>icantly<span class="_ _0"></span> improve performa<span class="_ _0"></span>nce an<span class="_ _0"></span>d</div><div class="t m0 x2 h6 y46 ff2 fs0 fc0 sc0 ls2c ws33">relia<span class="_ _0"></span>bility<span class="_ _5"></span>, whi<span class="_ _0"></span>le loweri<span class="_ _0"></span>ng power cons<span class="_ _0"></span>umpti<span class="_ _0"></span>on. They in<span class="_ _0"></span>her-</div><div class="t m0 x2 h6 y47 ff2 fs0 fc0 sc0 ls2d ws1d">ently <span class="_ _0"></span>use les<span class="_ _0"></span>s energy dur<span class="_ _0"></span>ing<span class="_ _0"></span> Erase and<span class="_ _0"></span> Program <span class="_ _0"></span>than al<span class="_ _0"></span>ter-</div><div class="t m0 x2 h6 y48 ff2 fs0 fc0 sc0 ls2e ws34">native flash te<span class="_ _0"></span>chnolo<span class="_ _0"></span>gies. The to<span class="_ _0"></span>tal energy consu<span class="_ _0"></span>med is a</div><div class="t m0 x2 h6 y49 ff2 fs0 fc0 sc0 ls2e ws9">functio<span class="_ _0"></span>n of th<span class="_ _0"></span>e appli<span class="_ _0"></span>ed voltage, cur<span class="_ _0"></span>rent, an<span class="_ _0"></span>d time of<span class="_ _0"></span> applic<span class="_ _0"></span>a-</div><div class="t m0 x9 h6 y4a ff2 fs0 fc0 sc0 ls2e ws35">tion. Si<span class="_ _0"></span>nce for any given voltage range, the S<span class="_ _0"></span>uperF<span class="_ _0"></span>lash</div><div class="t m0 x9 h6 y4b ff2 fs0 fc0 sc0 ls2e ws36">technol<span class="_ _0"></span>ogy uses less cur<span class="_ _0"></span>rent to p<span class="_ _0"></span>rogram and h<span class="_ _0"></span>as a shor<span class="_ _9"></span>ter</div><div class="t m0 x9 h6 y4c ff2 fs0 fc0 sc0 ls2d wse">erase time, the tot<span class="_ _0"></span>al ene<span class="_ _0"></span>rg<span class="_ _1"></span>y consu<span class="_ _0"></span>med dur<span class="_ _0"></span>ing<span class="_ _0"></span> any Erase or</div><div class="t m0 x9 h6 y4d ff2 fs0 fc0 sc0 ls2f ws37">Program o<span class="_ _0"></span>peration is<span class="_ _0"></span> less<span class="_ _0"></span> than al<span class="_ _0"></span>ter<span class="_ _0"></span>native flash <span class="_ _0"></span>techn<span class="_ _0"></span>olo-</div><div class="t m0 x9 h6 y4e ff2 fs0 fc0 sc0 ls30 ws29">gies. These<span class="_ _0"></span> devices also<span class="_ _0"></span> improve flexibility wh<span class="_ _0"></span>ile lower<span class="_ _0"></span>ing</div><div class="t m0 x9 h6 y4f ff2 fs0 fc0 sc0 ls23 ws38">the cos<span class="_ _0"></span>t for program, data<span class="_ _0"></span>, and con<span class="_ _0"></span>figurat<span class="_ _0"></span>ion sto<span class="_ _0"></span>rage appl<span class="_ _0"></span>i-</div><div class="t m0 x9 h6 y50 ff2 fs0 fc0 sc0 ls31 ws2">cations.</div><div class="t m0 x9 h6 y51 ff2 fs0 fc0 sc0 ls27 ws39">The S<span class="_ _0"></span>uperFlas<span class="_ _0"></span>h te<span class="_ _0"></span>chnology pr<span class="_ _0"></span>ovides fi<span class="_ _0"></span>x<span class="_ _1"></span>ed Eras<span class="_ _0"></span>e and P<span class="_ _0"></span>ro-</div><div class="t m0 x9 h6 y52 ff2 fs0 fc0 sc0 ls2e ws3a">gram times, in<span class="_ _0"></span>depende<span class="_ _0"></span>nt of th<span class="_ _0"></span>e numbe<span class="_ _0"></span>r of Erase/<span class="_ _0"></span>Program</div><div class="t m0 x9 h6 y53 ff2 fs0 fc0 sc0 ls27 ws3b">cycl<span class="_ _0"></span>es that h<span class="_ _0"></span>av<span class="_ _1"></span>e occu<span class="_ _0"></span>rred. T<span class="_ _0"></span>herefore the s<span class="_ _0"></span>ystem<span class="_ _0"></span> software</div><div class="t m0 x9 h6 y54 ff2 fs0 fc0 sc0 ls26 ws12">or hardwa<span class="_ _0"></span>re doe<span class="_ _0"></span>s not h<span class="_ _0"></span>av<span class="_ _1"></span>e to be<span class="_ _0"></span> modifi<span class="_ _0"></span>ed or <span class="_ _0"></span>de-rated<span class="_ _0"></span> as is</div><div class="t m0 x9 h6 y55 ff2 fs0 fc0 sc0 ls32 ws3c">nece<span class="_ _0"></span>ssar<span class="_ _0"></span>y<span class="_ _0"></span> with a<span class="_ _0"></span>lter<span class="_ _0"></span>nat<span class="_ _0"></span>ive flash te<span class="_ _0"></span>chnolog<span class="_ _0"></span>ies, who<span class="_ _0"></span>se Eras<span class="_ _0"></span>e</div><div class="t m0 x9 h6 y56 ff2 fs0 fc0 sc0 ls33 ws3d">and Pr<span class="_ _0"></span>ogram times<span class="_ _0"></span> increas<span class="_ _0"></span>e with<span class="_ _0"></span> accumul<span class="_ _0"></span>ated E<span class="_ _0"></span>rase/Pro-</div><div class="t m0 x9 h6 y57 ff2 fs0 fc0 sc0 ls2b ws3e">gr<span class="_ _1"></span>am cycl<span class="_ _1"></span>es.</div><div class="t m0 x9 h6 y58 ff2 fs0 fc0 sc0 ls2f ws3f">T<span class="_ _4"></span>o meet high de<span class="_ _0"></span>nsit<span class="_ _0"></span>y<span class="_ _4"></span>, surface mou<span class="_ _0"></span>nt requi<span class="_ _0"></span>rements, th<span class="_ _0"></span>e</div><div class="t m0 x9 h6 y59 ff2 fs0 fc0 sc0 ls27 ws40">SST39<span class="_ _0"></span>LF/VF16<span class="_ _0"></span>0 are offered in 48-<span class="_ _0"></span>lead TS<span class="_ _0"></span>OP and 48-b<span class="_ _0"></span>all</div><div class="t m0 x9 h6 y5a ff2 fs0 fc0 sc0 ls2f ws9">TFBGA<span class="_ _0"></span> packages. See F<span class="_ _0"></span>igure 1<span class="_ _0"></span> for pinout<span class="_ _0"></span>s.</div><div class="t m0 x9 h5 y5b ff3 fs3 fc0 sc0 ls34 ws41">Device Operation</div><div class="t m0 x9 h6 y5c ff2 fs0 fc0 sc0 ls2e ws42">Comma<span class="_ _0"></span>nds are us<span class="_ _0"></span>ed to<span class="_ _0"></span> initiat<span class="_ _0"></span>e the m<span class="_ _0"></span>emor<span class="_ _0"></span>y o<span class="_ _0"></span>peration f<span class="_ _0"></span>unc-</div><div class="t m0 x9 h6 y5d ff2 fs0 fc0 sc0 ls2e ws43">tions of<span class="_ _0"></span> the device. Comman<span class="_ _0"></span>ds are w<span class="_ _0"></span>rit<span class="_ _0"></span>ten to th<span class="_ _0"></span>e device</div><div class="t m0 x9 h6 y5e ff2 fs0 fc0 sc0 ls32 ws44">using s<span class="_ _0"></span>tanda<span class="_ _0"></span>rd micr<span class="_ _0"></span>oproc<span class="_ _0"></span>essor wr<span class="_ _0"></span>it<span class="_ _0"></span>e sequen<span class="_ _0"></span>ces. A co<span class="_ _0"></span>m-</div><div class="t m0 x9 h6 y5f ff2 fs0 fc0 sc0 ls33 ws45">mand is<span class="_ _0"></span> written<span class="_ _0"></span> by asser<span class="_ _9"></span>ting WE<span class="_ _0"></span># low while keeping<span class="_ _0"></span> CE#</div><div class="t m0 x9 h6 y60 ff2 fs0 fc0 sc0 ls23 ws46">low<span class="_ _5"></span>. T<span class="_ _0"></span>he add<span class="_ _0"></span>ress <span class="_ _0"></span>bus is la<span class="_ _0"></span>tched o<span class="_ _0"></span>n the<span class="_ _0"></span> falling edge<span class="_ _0"></span> of WE<span class="_ _0"></span>#</div><div class="t m0 x9 h6 y61 ff2 fs0 fc0 sc0 ls26 ws47">or CE#, <span class="_ _0"></span>whichev<span class="_ _1"></span>er occu<span class="_ _0"></span>rs last.<span class="_ _0"></span> The data<span class="_ _0"></span> bus is latc<span class="_ _0"></span>hed on</div><div class="t m0 x9 h6 y62 ff2 fs0 fc0 sc0 ls24 ws14">the r<span class="_ _0"></span>ising<span class="_ _0"></span> edge of <span class="_ _0"></span>WE# <span class="_ _0"></span>or CE#,<span class="_ _0"></span> whichev<span class="_ _1"></span>er occ<span class="_ _0"></span>urs firs<span class="_ _0"></span>t.</div><div class="t m0 xd h3 y63 ff2 fs1 fc1 sc0 ls35 ws48">SST39LF/<span class="_ _1"></span>VF1603<span class="_ _1"></span>.0 &amp; 2.7V 16<span class="_ _1"></span>Mb (x16) MP<span class="_ _1"></span>F memories</div><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div> </body> </html>
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