eepromVerilog24c32code.zip_eeprom_24c32

<html xmlns="http://www.w3.org/1999/xhtml"> <head> <meta charset="utf-8"> <meta name="generator" content="pdf2htmlEX"> <meta http-equiv="X-UA-Compatible" content="IE=edge,chrome=1"> <link rel="stylesheet" href="https://static.pudn.com/base/css/base.min.css"> <link rel="stylesheet" href="https://static.pudn.com/base/css/fancy.min.css"> <link rel="stylesheet" href="https://static.pudn.com/prod/directory_preview_static/622b3c9eff7f9c46a613a896/raw.css"> <script src="https://static.pudn.com/base/js/compatibility.min.js"></script> <script src="https://static.pudn.com/base/js/pdf2htmlEX.min.js"></script> <script> try{ pdf2htmlEX.defaultViewer = new pdf2htmlEX.Viewer({}); }catch(e){} </script> <title></title> </head> <body> <div id="sidebar" style="display: none"> <div id="outline"> </div> </div> <div id="pf1" class="pf w0 h0" data-page-no="1"><div class="pc pc1 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/622b3c9eff7f9c46a613a896/bg1.jpg"><div class="t m0 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0"><span class="fc1 sc0">1</span></div><div class="t m0 x2 h3 y2 ff1 fs1 fc0 sc0 ls1 ws0">Features</div><div class="t m0 x2 h2 y3 ff2 fs0 fc0 sc0 ls0 ws0">•<span class="_ _0"> </span><span class="ff1 fs2 ls2 ws1">Low<span class="_ _1"></span>-vo<span class="_ _1"></span>ltage and Stan<span class="_ _1"></span>dar<span class="_ _1"></span>d-v<span class="_ _1"></span>oltage Opera<span class="_ _1"></span>tion</span></div><div class="t m0 x3 h4 y4 ff1 fs2 fc0 sc0 ls3 ws1">–<span class="_ _2"> </span>5.0 (V</div><div class="t m0 x4 h5 y5 ff1 fs3 fc0 sc0 ls4 ws0">CC</div><div class="t m0 x5 h4 y4 ff1 fs2 fc0 sc0 ls5 ws2"> = 4.5V to 5.<span class="_ _1"></span>5V)</div><div class="t m0 x3 h4 y6 ff1 fs2 fc0 sc0 ls3 ws3">–<span class="_ _2"> </span>2.7 (V</div><div class="t m0 x4 h5 y7 ff1 fs3 fc0 sc0 ls4 ws0">CC</div><div class="t m0 x5 h4 y6 ff1 fs2 fc0 sc0 ls5 ws2"> = 2.7V to 5.<span class="_ _1"></span>5V)</div><div class="t m0 x3 h4 y8 ff1 fs2 fc0 sc0 ls3 ws3">–<span class="_ _2"> </span>2.5 (V</div><div class="t m0 x4 h5 y9 ff1 fs3 fc0 sc0 ls4 ws0">CC</div><div class="t m0 x5 h4 y8 ff1 fs2 fc0 sc0 ls5 ws2"> = 2.5V to 5.<span class="_ _1"></span>5V)</div><div class="t m0 x3 h4 ya ff1 fs2 fc0 sc0 ls3 ws3">–<span class="_ _2"> </span>1.8 (V</div><div class="t m0 x4 h5 yb ff1 fs3 fc0 sc0 ls4 ws0">CC</div><div class="t m0 x5 h4 ya ff1 fs2 fc0 sc0 ls5 ws2"> = 1.8V to 5.<span class="_ _1"></span>5V)</div><div class="t m0 x2 h2 yc ff2 fs0 fc0 sc0 ls0 ws0">•<span class="_ _0"> </span><span class="ff1 fs2 ls6 ws4">Interna<span class="_ _1"></span>lly <span class="_ _1"></span>Org<span class="_ _1"></span>anized 128 x<span class="_ _1"></span> 8 (1K)<span class="_ _1"></span>, 256 x 8 (2<span class="_ _1"></span>K), 512 x<span class="_ _1"></span> 8 (4K),</span></div><div class="t m0 x6 h4 yd ff1 fs2 fc0 sc0 ls6 ws4">1024 x 8<span class="_ _1"></span> (8K) <span class="_ _1"></span>or 2048 x 8 <span class="_ _1"></span>(16K)</div><div class="t m0 x2 h2 ye ff2 fs0 fc0 sc0 ls0 ws0">•<span class="_ _0"> </span><span class="ff1 fs2 ls7 ws5">2-wire Serial Interface</span></div><div class="t m0 x2 h2 yf ff2 fs0 fc0 sc0 ls0 ws0">•<span class="_ _0"> </span><span class="ff1 fs2 ls2 ws1">Schmitt <span class="_ _1"></span>T<span class="_ _3"></span>rigger<span class="_ _3"></span>, Filtered Inputs <span class="_ _1"></span>for No<span class="_ _1"></span>ise Suppressi<span class="_ _1"></span>on</span></div><div class="t m0 x2 h2 y10 ff2 fs0 fc0 sc0 ls0 ws0">•<span class="_ _0"> </span><span class="ff1 fs2 ls8 ws6">Bi-direc<span class="_ _1"></span>tional Data<span class="_ _1"></span> T<span class="_ _3"></span>ransfer<span class="_ _1"></span> Prot<span class="_ _1"></span>ocol</span></div><div class="t m0 x2 h2 y11 ff2 fs0 fc0 sc0 ls0 ws0">•<span class="_ _0"> </span><span class="ff1 fs2 ls9 ws7">100 kH<span class="_ _1"></span>z (1.8V<span class="_ _4"></span>, 2.5V<span class="_ _4"></span>, 2.7V) and 400 <span class="_ _1"></span>kHz (5V) C<span class="_ _1"></span>ompatibili<span class="_ _1"></span>ty</span></div><div class="t m0 x2 h2 y12 ff2 fs0 fc0 sc0 ls0 ws0">•<span class="_ _0"> </span><span class="ff1 fs2 lsa ws8">Write Pr<span class="_ _1"></span>otect Pin <span class="_ _1"></span>for Har<span class="_ _1"></span>dware<span class="_ _1"></span> Data Pr<span class="_ _1"></span>otection</span></div><div class="t m0 x2 h2 y13 ff2 fs0 fc0 sc0 ls0 ws0">•<span class="_ _0"> </span><span class="ff1 fs2 ls2 ws1">8-b<span class="_ _1"></span>yte P<span class="_ _1"></span>age (1K, <span class="_ _1"></span>2K), 16-b<span class="_ _1"></span>yte P<span class="_ _1"></span>age (4<span class="_ _1"></span>K, 8K, 16K) W<span class="_ _1"></span>rite Modes</span></div><div class="t m0 x2 h2 y14 ff2 fs0 fc0 sc0 ls0 ws0">•<span class="_ _0"> </span><span class="ff1 fs2 lsb ws9">P<span class="_ _1"></span>artial P<span class="_ _1"></span>age Writes are<span class="_ _1"></span> Allowe<span class="_ _1"></span>d</span></div><div class="t m0 x2 h2 y15 ff2 fs0 fc0 sc0 ls0 ws0">•<span class="_ _0"> </span><span class="ff1 fs2 lsc wsa">Self-timed W<span class="_ _1"></span>rite Cyc<span class="_ _1"></span>le (10 m<span class="_ _1"></span>s max)</span></div><div class="t m0 x2 h2 y16 ff2 fs0 fc0 sc0 ls0 ws0">•<span class="_ _0"> </span><span class="ff1 fs2 lsd">High<span class="_ _5"></span>-re<span class="_ _5"></span>lia<span class="_ _5"></span>bili<span class="_ _5"></span>ty</span></div><div class="t m0 x3 h4 y17 ff1 fs2 fc0 sc0 lse ws0">–<span class="_ _2"> </span>Enduran<span class="_ _1"></span>ce: 1 Millio<span class="_ _1"></span>n Write Cyc<span class="_ _1"></span>les</div><div class="t m0 x3 h4 y18 ff1 fs2 fc0 sc0 ls9 ws7">–<span class="_ _2"> </span>Data Re<span class="_ _1"></span>tention: 10<span class="_ _1"></span>0 Y<span class="_ _3"></span>ear<span class="_ _1"></span>s</div><div class="t m0 x2 h2 y19 ff2 fs0 fc0 sc0 ls0 ws0">•<span class="_ _0"> </span><span class="ff1 fs2 lsf wsb">A<span class="_ _1"></span>utomo<span class="_ _1"></span>tive Grade and Extended T<span class="_ _3"></span>emperature D<span class="_ _1"></span>evices<span class="_ _1"></span> A<span class="_ _1"></span>v<span class="_ _1"></span>ailable</span></div><div class="t m0 x2 h2 y1a ff2 fs0 fc0 sc0 ls0 ws0">•<span class="_ _0"> </span><span class="ff1 fs2 ls10 wsc">8-lead JEDEC <span class="_ _1"></span>SOIC, 8-pin PDIP a<span class="_ _1"></span>nd 8-lead TSSOP P<span class="_ _3"></span>ackages</span></div><div class="t m0 x2 h3 y1b ff1 fs1 fc0 sc0 ls11 ws0">Description</div><div class="t m0 x2 h2 y1c ff2 fs0 fc0 sc0 ls12 wsd">The AT24<span class="_ _5"></span>C01A/02/04<span class="_ _5"></span>/08/16 <span class="_ _5"></span>provides <span class="_ _5"></span>1024/2048/4<span class="_ _5"></span>096/8192/1<span class="_ _5"></span>6384 bits<span class="_ _5"></span> of ser<span class="_ _5"></span>ial elec-</div><div class="t m0 x2 h2 y1d ff2 fs0 fc0 sc0 ls13 wse">trically eras<span class="_ _5"></span>able and programmable <span class="_ _5"></span>read-only memory (<span class="_ _5"></span>EEPROM) organi<span class="_ _5"></span>zed as</div><div class="t m0 x2 h2 y1e ff2 fs0 fc0 sc0 ls14 wsf">128/256/51<span class="_ _5"></span>2/1024/2<span class="_ _5"></span>048 words of 8 b<span class="_ _5"></span>its each.<span class="_ _5"></span> The devi<span class="_ _5"></span>ce is opt<span class="_ _5"></span>imized fo<span class="_ _5"></span>r use in many</div><div class="t m0 x2 h2 y1f ff2 fs0 fc0 sc0 ls15 ws10">indust<span class="_ _1"></span>rial a<span class="_ _1"></span>nd co<span class="_ _1"></span>mmerci<span class="_ _1"></span>al appli<span class="_ _1"></span>catio<span class="_ _1"></span>ns wh<span class="_ _1"></span>ere l<span class="_ _1"></span>ow-powe<span class="_ _1"></span>r and<span class="_ _1"></span> low-<span class="_ _1"></span>voltage<span class="_ _1"></span> oper<span class="_ _1"></span>ation</div><div class="t m0 x2 h2 y20 ff2 fs0 fc0 sc0 ls16 ws11">are essen<span class="_ _5"></span>tial. T<span class="_ _5"></span>he AT24C<span class="_ _5"></span>01A/02/<span class="_ _5"></span>04/08/16<span class="_ _5"></span> is availab<span class="_ _5"></span>le in spa<span class="_ _5"></span>ce-sav<span class="_ _5"></span>ing 8-pin P<span class="_ _5"></span>DIP,</div><div class="t m0 x2 h2 y21 ff2 fs0 fc0 sc0 ls17 ws12">(AT24C01A/02/04/08/16)<span class="_ _5"></span>, 8-lead TSSOP (<span class="_ _5"></span>AT24C01A/02/04/08<span class="_ _5"></span>/16) and 8-lead</div><div class="t m0 x2 h2 y22 ff2 fs0 fc0 sc0 ls18 ws13">JEDEC SO<span class="_ _5"></span>IC (AT24<span class="_ _5"></span>C01A/<span class="_ _5"></span>02/04/<span class="_ _5"></span>08/16) pa<span class="_ _5"></span>ckages and<span class="_ _5"></span> is access<span class="_ _5"></span>ed via a 2-wi<span class="_ _5"></span>re serial</div><div class="t m0 x2 h2 y23 ff2 fs0 fc0 sc0 ls18 ws14">interfac<span class="_ _5"></span>e. In additio<span class="_ _5"></span>n, the entire<span class="_ _5"></span> family is ava<span class="_ _5"></span>ilable in<span class="_ _5"></span> 5.0V (4.5V<span class="_ _5"></span> to 5.5V), 2.7V (2<span class="_ _5"></span>.7V to</div><div class="t m0 x2 h2 y24 ff2 fs0 fc0 sc0 ls19 ws15">5.5V), 2.<span class="_ _5"></span>5V (2.5V<span class="_ _5"></span> to 5.5V) and<span class="_ _5"></span> 1.8V (1.8<span class="_ _5"></span>V to 5.5V)<span class="_ _5"></span> version<span class="_ _5"></span>s.</div><div class="t m0 x7 h6 y25 ff1 fs4 fc0 sc0 ls7 ws0">2-wire</div><div class="t m0 x7 h6 y26 ff1 fs4 fc0 sc0 ls7 ws16">Serial EEPROM</div><div class="t m0 x7 h7 y27 ff1 fs5 fc0 sc0 ls1a ws17">1K (1<span class="_ _1"></span>28 x 8<span class="_ _1"></span>)</div><div class="t m0 x7 h7 y28 ff1 fs5 fc0 sc0 ls1a ws17">2K (2<span class="_ _1"></span>56 x 8<span class="_ _1"></span>)</div><div class="t m0 x7 h7 y29 ff1 fs5 fc0 sc0 ls1a ws17">4K (5<span class="_ _1"></span>12 x 8<span class="_ _1"></span>)</div><div class="t m0 x7 h7 y2a ff1 fs5 fc0 sc0 ls1b ws18">8K (1<span class="_ _1"></span>024 x<span class="_ _1"></span> 8)</div><div class="t m0 x7 h7 y2b ff1 fs5 fc0 sc0 ls1c ws19">16K (<span class="_ _1"></span>2048 x 8<span class="_ _1"></span>)</div><div class="t m0 x7 h6 y2c ff1 fs4 fc0 sc0 ls1d ws0">AT24C01A</div><div class="t m0 x7 h6 y2d ff1 fs4 fc0 sc0 ls1e ws0">AT24C02</div><div class="t m0 x7 h6 y2e ff1 fs4 fc0 sc0 ls1e ws0">AT24C04</div><div class="t m0 x7 h6 y2f ff1 fs4 fc0 sc0 ls1e ws0">AT24C08</div><div class="t m0 x7 h6 y30 ff1 fs4 fc0 sc0 ls1e ws0">AT24C16</div><div class="t m0 x8 h8 y31 ff2 fs6 fc0 sc0 ls1f ws1a">Rev<span class="_ _1"></span>. 0180<span class="_ _1"></span>E–09<span class="_ _1"></span>/00</div><div class="t m0 x2 h3 y32 ff1 fs1 fc0 sc0 ls20 ws1b">Pin Configurations</div><div class="t m0 x9 h4 y33 ff1 fs2 fc0 sc0 ls3 ws3">Pin Name<span class="_ _6"> </span>Function</div><div class="t m0 x9 h4 y34 ff2 fs2 fc0 sc0 lsb ws9">A0 - A2<span class="_ _7"> </span>Address Inputs</div><div class="t m0 x9 h4 y35 ff2 fs2 fc0 sc0 ls6 ws4">SD<span class="_ _1"></span>A<span class="_ _8"> </span>Serial Data</div><div class="t m0 x9 h4 y36 ff2 fs2 fc0 sc0 ls21 ws1c">SCL<span class="_ _9"> </span>Serial Cloc<span class="_ _1"></span>k <span class="_ _1"></span>Input </div><div class="t m0 x9 h4 y37 ff2 fs2 fc0 sc0 ls22 ws1d">WP<span class="_ _a"> </span>Write Protect</div><div class="t m0 x9 h4 y38 ff2 fs2 fc0 sc0 ls23 ws1e">NC<span class="_ _b"> </span>No Connect</div><div class="t m0 xa h4 y39 ff2 fs2 fc0 sc0 ls24 ws1f">8-le<span class="_ _5"></span>ad SO<span class="_ _5"></span>IC</div><div class="t m0 xb h9 y3a ff3 fs7 fc0 sc0 ls0 ws0">1</div><div class="t m0 xb h9 y3b ff3 fs7 fc0 sc0 ls0 ws0">2</div><div class="t m0 xb h9 y3c ff3 fs7 fc0 sc0 ls0 ws0">3</div><div class="t m0 xb h9 y3d ff3 fs7 fc0 sc0 ls0 ws0">4</div><div class="t m0 xc h9 y3e ff3 fs7 fc0 sc0 ls0 ws0">8</div><div class="t m0 xc h9 y3f ff3 fs7 fc0 sc0 ls0 ws0">7</div><div class="t m0 xc h9 y40 ff3 fs7 fc0 sc0 ls0 ws0">6</div><div class="t m0 xc h9 y41 ff3 fs7 fc0 sc0 ls0 ws0">5</div><div class="t m0 xd h9 y3a ff3 fs7 fc0 sc0 ls0 ws0">A0</div><div class="t m0 xd h9 y3b ff3 fs7 fc0 sc0 ls0 ws0">A1</div><div class="t m0 xd h9 y3c ff3 fs7 fc0 sc0 ls0 ws0">A2</div><div class="t m0 xe h9 y3d ff3 fs7 fc0 sc0 ls0 ws0">GND</div><div class="t m0 xf h9 y3a ff3 fs7 fc0 sc0 ls0 ws0">VCC</div><div class="t m0 xf h9 y3b ff3 fs7 fc0 sc0 ls25 ws0">WP</div><div class="t m0 xf h9 y3c ff3 fs7 fc0 sc0 ls0 ws0">SCL</div><div class="t m0 xf h9 y3d ff3 fs7 fc0 sc0 ls0 ws0">SDA</div><div class="t m0 x10 h4 y39 ff3 fs2 fc0 sc0 ls26 ws20">8-pin PD<span class="_ _1"></span>IP</div><div class="t m0 x4 h9 y42 ff3 fs7 fc0 sc0 ls0 ws0">1</div><div class="t m0 x4 h9 y43 ff3 fs7 fc0 sc0 ls0 ws0">2</div><div class="t m0 x4 h9 y44 ff3 fs7 fc0 sc0 ls0 ws0">3</div><div class="t m0 x4 h9 y45 ff3 fs7 fc0 sc0 ls0 ws0">4</div><div class="t m0 x11 h9 y46 ff3 fs7 fc0 sc0 ls0 ws0">8</div><div class="t m0 x11 h9 y47 ff3 fs7 fc0 sc0 ls0 ws0">7</div><div class="t m0 x11 h9 y48 ff3 fs7 fc0 sc0 ls0 ws0">6</div><div class="t m0 x11 h9 y49 ff3 fs7 fc0 sc0 ls0 ws0">5</div><div class="t m0 x12 h9 y42 ff3 fs7 fc0 sc0 ls0 ws0">A0</div><div class="t m0 x12 h9 y43 ff3 fs7 fc0 sc0 ls0 ws0">A1</div><div class="t m0 x12 h9 y44 ff3 fs7 fc0 sc0 ls0 ws0">A2</div><div class="t m0 x13 h9 y45 ff3 fs7 fc0 sc0 ls0 ws0">GND</div><div class="t m0 x14 h9 y46 ff3 fs7 fc0 sc0 ls0 ws0">VCC</div><div class="t m0 x14 h9 y47 ff3 fs7 fc0 sc0 ls25 ws0">WP</div><div class="t m0 x14 h9 y48 ff3 fs7 fc0 sc0 ls0 ws0">SCL</div><div class="t m0 x14 h9 y49 ff3 fs7 fc0 sc0 ls0 ws0">SDA</div><div class="t m0 x15 h4 y4a ff3 fs2 fc0 sc0 ls26 ws21">8-lead TSSOP</div><div class="t m0 xa h9 y4b ff3 fs7 fc0 sc0 ls0 ws0">1</div><div class="t m0 xa h9 y4c ff3 fs7 fc0 sc0 ls0 ws0">2</div><div class="t m0 xa h9 y4d ff3 fs7 fc0 sc0 ls0 ws0">3</div><div class="t m0 xa h9 y4e ff3 fs7 fc0 sc0 ls0 ws0">4</div><div class="t m0 x16 h9 y4f ff3 fs7 fc0 sc0 ls0 ws0">8</div><div class="t m0 x16 h9 y50 ff3 fs7 fc0 sc0 ls0 ws0">7</div><div class="t m0 x16 h9 y51 ff3 fs7 fc0 sc0 ls0 ws0">6</div><div class="t m0 x16 h9 y52 ff3 fs7 fc0 sc0 ls0 ws0">5</div><div class="t m0 x17 h9 y53 ff3 fs7 fc0 sc0 ls0 ws0">A0</div><div class="t m0 x17 h9 y54 ff3 fs7 fc0 sc0 ls0 ws0">A1</div><div class="t m0 x17 h9 y55 ff3 fs7 fc0 sc0 ls0 ws0">A2</div><div class="t m0 x18 h9 y56 ff3 fs7 fc0 sc0 ls0 ws0">GND</div><div class="t m0 x19 h9 y4f ff3 fs7 fc0 sc0 ls0 ws0">VCC</div><div class="t m0 x19 h9 y50 ff3 fs7 fc0 sc0 ls25 ws0">WP</div><div class="t m0 x19 h9 y51 ff3 fs7 fc0 sc0 ls0 ws0">SCL</div><div class="t m0 x19 h9 y52 ff3 fs7 fc0 sc0 ls0 ws0">SDA</div></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div> </body> </html>

<div id="pf2" class="pf w0 h0" data-page-no="2"><div class="pc pc2 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/622b3c9eff7f9c46a613a896/bg2.jpg"><div class="t m1 x1a h6 y57 ff1 fs4 fc0 sc0 ls1e ws0">AT24C01A/02<span class="_ _5"></span>/04/08/16</div><div class="t m1 x1b h2 y1 ff1 fs0 fc0 sc0 ls0 ws0">2</div><div class="t m1 x2 h3 y58 ff1 fs1 fc0 sc0 ls27 ws22">Block Diag<span class="_ _1"></span>ram</div><div class="t m1 x2 h3 y59 ff1 fs1 fc0 sc0 ls28 ws23">Pin Description</div><div class="t m1 x2 h2 y5a ff1 fs0 fc0 sc0 ls29 ws24">SERI<span class="_ _1"></span>AL C<span class="_ _1"></span>LOCK <span class="_ _1"></span>(SCL<span class="_ _1"></span>):<span class="ff3 ls2a wse"> Th<span class="_ _1"></span>e SCL inpu<span class="_ _1"></span>t is use<span class="_ _1"></span>d to posi<span class="_ _1"></span>tive</span></div><div class="t m1 x2 h2 y5b ff3 fs0 fc0 sc0 ls2b ws25">edge cl<span class="_ _1"></span>ock data <span class="_ _1"></span>into <span class="_ _1"></span>each EEPROM<span class="_ _1"></span> device a<span class="_ _1"></span>nd ne<span class="_ _1"></span>gative</div><div class="t m1 x2 h2 y5c ff3 fs0 fc0 sc0 ls14 wsf">edge clo<span class="_ _5"></span>ck data o<span class="_ _5"></span>ut of each <span class="_ _5"></span>device.</div><div class="t m1 x2 h2 y5d ff1 fs0 fc0 sc0 ls2c ws26">SERIAL DATA (SDA<span class="_ _5"></span>):<span class="ff3 ls2d ws27"> The SDA <span class="_ _1"></span>pin is bi-d<span class="_ _1"></span>irectional fo<span class="_ _1"></span>r</span></div><div class="t m1 x2 h2 y5e ff3 fs0 fc0 sc0 ls2e ws28">serial data tran<span class="_ _1"></span>sfer. This pin is open<span class="_ _1"></span>-drain driven and m<span class="_ _1"></span>ay</div><div class="t m1 x2 h2 y5f ff3 fs0 fc0 sc0 ls2f ws29">be wire-ORed with any number of other open-drain or</div><div class="t m1 x2 h2 y60 ff3 fs0 fc0 sc0 ls30 ws2a">open-co<span class="_ _5"></span>llector<span class="_ _5"></span> device<span class="_ _5"></span>s.</div><div class="t m1 x2 h2 y61 ff1 fs0 fc0 sc0 ls31 ws24">DEVICE/PAGE ADDRE<span class="_ _5"></span>SSES (A2, A1, A0):<span class="ff3 ls32 ws2b"> Th<span class="_ _5"></span>e A2,<span class="_ _5"></span> A1</span></div><div class="t m1 x2 h2 y62 ff3 fs0 fc0 sc0 ls33 ws2c">and A0 pins a<span class="_ _1"></span>re device ad<span class="_ _1"></span>dress input<span class="_ _1"></span>s that are<span class="_ _1"></span> hard wired</div><div class="t m1 x2 h2 y63 ff3 fs0 fc0 sc0 ls34 ws2d">for the AT24C01A and the AT<span class="_ _1"></span>24C02. As many as eight</div><div class="t m1 x2 h2 y64 ff3 fs0 fc0 sc0 ls35 ws10">1K/2K devic<span class="_ _5"></span>es may be a<span class="_ _5"></span>ddressed on <span class="_ _5"></span>a single bus<span class="_ _5"></span> system</div><div class="t m1 x2 h2 y65 ff3 fs0 fc0 sc0 ls36 ws27">(device<span class="_ _1"></span> addressing i<span class="_ _1"></span>s disc<span class="_ _1"></span>ussed in de<span class="_ _1"></span>tail un<span class="_ _1"></span>der the D<span class="_ _1"></span>evice</div><div class="t m1 x2 h2 y66 ff3 fs0 fc0 sc0 ls37 ws2e">Addres<span class="_ _5"></span>sing secti<span class="_ _5"></span>on).</div><div class="t m1 x2 h2 y67 ff3 fs0 fc0 sc0 ls38 ws2f">The AT24C0<span class="_ _5"></span>4 uses the A2 and A1 i<span class="_ _5"></span>nputs for hard<span class="_ _5"></span> wire</div><div class="t m1 x2 h2 y68 ff3 fs0 fc0 sc0 ls39 ws28">addressing<span class="_ _1"></span> and a total<span class="_ _1"></span> of four 4<span class="_ _1"></span>K devices may be</div><div class="t m1 x1c h2 y69 ff3 fs0 fc0 sc0 ls3a ws30">addre<span class="_ _1"></span>ssed on a si<span class="_ _1"></span>ngle bus syst<span class="_ _1"></span>em. The<span class="_ _1"></span> A0 pin is a</div><div class="t m1 x1c h2 y6a ff3 fs0 fc0 sc0 ls3b ws0">no<span class="_"> </span>co<span class="_ _5"></span>nnect.</div><div class="t m1 x1c h2 y6b ff3 fs0 fc0 sc0 ls3c ws31">The AT24C0<span class="_ _5"></span>8 only uses the A2<span class="_ _5"></span> input for hardwir<span class="_ _5"></span>e address-</div><div class="t m1 x1c h2 y6c ff3 fs0 fc0 sc0 ls3d ws32">ing and<span class="_ _5"></span> a total of two 8K devices<span class="_ _5"></span> may be addresse<span class="_ _5"></span>d on a</div><div class="t m1 x1c h2 y6d ff3 fs0 fc0 sc0 ls3e ws33">single <span class="_ _5"></span>bus system<span class="_ _5"></span>. The A0<span class="_ _5"></span> and A1 pi<span class="_ _5"></span>ns are no c<span class="_ _5"></span>onnects.</div><div class="t m1 x1c h2 y6e ff3 fs0 fc0 sc0 ls3e wsf">The AT24<span class="_ _5"></span>C16 does no<span class="_ _5"></span>t use the de<span class="_ _5"></span>vice add<span class="_ _5"></span>ress pi<span class="_ _5"></span>ns, which</div><div class="t m1 x1c h2 y6f ff3 fs0 fc0 sc0 ls3f ws28">limits the number of devices on a single bus to one. The</div><div class="t m1 x1c h2 y70 ff3 fs0 fc0 sc0 ls12 ws34">A0, A1 an<span class="_ _5"></span>d A2 pins<span class="_ _5"></span> are no con<span class="_ _5"></span>nects.</div><div class="t m1 x1c h2 y71 ff1 fs0 fc0 sc0 ls40 ws35">WRITE PROTECT (WP):<span class="_ _1"></span><span class="ff3 ls41 ws36"> The AT24<span class="_ _1"></span>C01A/<span class="_ _1"></span>02/04/1<span class="_ _1"></span>6 has a</span></div><div class="t m1 x1c h2 y72 ff3 fs0 fc0 sc0 ls42 ws37">Write Pro<span class="_ _1"></span>tect pi<span class="_ _1"></span>n that provi<span class="_ _1"></span>des hardw<span class="_ _1"></span>are dat<span class="_ _1"></span>a prote<span class="_ _1"></span>ction.</div><div class="t m1 x1c h2 y73 ff3 fs0 fc0 sc0 ls43 ws2d">The Write Protect pin <span class="_ _5"></span>allows normal read/wr<span class="_ _5"></span>ite operations</div><div class="t m1 x1c h2 y74 ff3 fs0 fc0 sc0 ls19 ws11">when conn<span class="_ _5"></span>ected to gr<span class="_ _5"></span>ound (GND<span class="_ _5"></span>). When th<span class="_ _5"></span>e Write Pro<span class="_ _5"></span>tect</div><div class="t m1 x1c h2 y75 ff3 fs0 fc0 sc0 ls44 ws2d">pin i<span class="_ _1"></span>s connec<span class="_ _1"></span>ted t<span class="_ _1"></span>o V</div><div class="t m1 x1d h8 y76 ff3 fs6 fc0 sc0 ls45 ws0">CC</div><div class="t m1 x1e h2 y77 ff3 fs0 fc0 sc0 ls46 ws38">, th<span class="_ _5"></span>e write p<span class="_ _5"></span>rotec<span class="_ _5"></span>tion<span class="_ _5"></span> featur<span class="_ _5"></span>e is</div><div class="t m1 x1c h2 y78 ff3 fs0 fc0 sc0 ls3c ws39">enabled a<span class="_ _5"></span>nd operat<span class="_ _5"></span>es as shown<span class="_ _5"></span> in the <span class="_ _5"></span>following<span class="_ _5"></span> table.</div><div class="t m1 x2 h3 y79 ff1 fs1 fc0 sc0 ls47 ws3a">Absolute Maxim<span class="_ _1"></span>um Ratings</div><div class="t m1 x9 h4 y7a ff3 fs2 fc0 sc0 ls26 ws20">Opera<span class="_ _1"></span>ting T<span class="_ _4"></span>emperatu<span class="_ _1"></span>re<span class="_ _c"></span>...............<span class="_ _1"></span>...........<span class="_ _1"></span>........<span class="_ _d"> </span>-55<span class="ff4 ls0 ws0">°</span><span class="ls3 ws3">C to +1<span class="_ _1"></span>25<span class="ff4 ls0 ws0">°<span class="ff3">C</span></span></span></div><div class="t m1 xc h4 y7b ff3 fs2 fc0 sc0 lsf ws3b">*NO<span class="_ _3"></span>TICE:<span class="_ _e"> </span>Stresses<span class="_ _1"></span> bey<span class="_ _1"></span>on<span class="_ _1"></span>d those l<span class="_ _1"></span>isted und<span class="_ _1"></span>er <span class="ff2 ls0 ws0">“<span class="ff3 lse">Absolut<span class="_ _1"></span>e </span></span></div><div class="t m1 x1f h4 y7c ff3 fs2 fc0 sc0 ls48 ws3c">Maximum<span class="_ _5"></span> Rating<span class="_ _5"></span>s<span class="ff2 ls0 ws0">”</span><span class="ls49 ws3d"> ma<span class="_ _1"></span>y ca<span class="_ _1"></span>use permane<span class="_ _1"></span>nt dam-</span></div><div class="t m1 x1f h4 y7d ff3 fs2 fc0 sc0 ls4a ws3e">age to the de<span class="_ _3"></span>vice. Th<span class="_ _1"></span>is is a stres<span class="_ _1"></span>s rating<span class="_ _1"></span> only an<span class="_ _1"></span>d </div><div class="t m1 x1f h4 y7e ff3 fs2 fc0 sc0 ls4a ws3e">funct<span class="_ _1"></span>ional oper<span class="_ _1"></span>ation of the de<span class="_ _1"></span>vic<span class="_ _1"></span>e at these or an<span class="_ _1"></span>y </div><div class="t m1 x1f h4 y7f ff3 fs2 fc0 sc0 ls4b ws3f">other <span class="_ _1"></span>condition<span class="_ _1"></span>s be<span class="_ _1"></span>y<span class="_ _1"></span>ond th<span class="_ _1"></span>ose indic<span class="_ _1"></span>ated i<span class="_ _1"></span>n the </div><div class="t m1 x1f h4 y80 ff3 fs2 fc0 sc0 ls21 ws1c">oper<span class="_ _1"></span>ational s<span class="_ _1"></span>ections<span class="_ _1"></span> of thi<span class="_ _1"></span>s specif<span class="_ _1"></span>ication i<span class="_ _1"></span>s not </div><div class="t m1 x1f h4 y81 ff3 fs2 fc0 sc0 ls21 ws1c">implied<span class="_ _1"></span>. Expo<span class="_ _1"></span>sure to abs<span class="_ _1"></span>olute ma<span class="_ _1"></span>xim<span class="_ _1"></span>um rat<span class="_ _1"></span>ing </div><div class="t m1 x1f h4 y82 ff3 fs2 fc0 sc0 ls4c ws40">conditi<span class="_ _1"></span>ons f<span class="_ _1"></span>or e<span class="_ _1"></span>x<span class="_ _1"></span>tended<span class="_ _1"></span> periods ma<span class="_ _1"></span>y a<span class="_ _1"></span>ff<span class="_ _1"></span>ect de<span class="_ _1"></span>v<span class="_ _1"></span>ice </div><div class="t m1 x1f h4 y83 ff3 fs2 fc0 sc0 ls4d ws0">reliabil<span class="_ _1"></span>ity<span class="_ _3"></span>.</div><div class="t m1 x9 h4 y84 ff3 fs2 fc0 sc0 ls4e ws41">Storage<span class="_ _1"></span> T<span class="_ _4"></span>emperature<span class="_ _f"> </span>.............<span class="_ _1"></span>...........<span class="_ _1"></span>...........<span class="_ _1"></span>..<span class="_"> </span>-65<span class="ff4 ls0 ws0">°</span><span class="ls3 ws3">C to<span class="_ _1"></span> +150<span class="ff4 ls0 ws0">°<span class="ff3">C</span></span></span></div><div class="t m1 x9 h4 y7f ff3 fs2 fc0 sc0 ls4f ws42">V<span class="_ _3"></span>oltage o<span class="_ _1"></span>n An<span class="_ _1"></span>y Pin</div><div class="t m1 x9 h4 y80 ff3 fs2 fc0 sc0 ls4e ws41">with Respe<span class="_ _1"></span>ct to Ground<span class="_ _f"> </span>..............<span class="_ _1"></span>.................<span class="_ _1"></span>......<span class="_ _5"></span>-1.0V to +7.0V</div><div class="t m1 x9 h4 y85 ff3 fs2 fc0 sc0 ls50 ws43">Maximu<span class="_ _1"></span>m Operati<span class="_ _1"></span>ng V<span class="_ _3"></span>oltage<span class="_"> </span>......<span class="_ _1"></span>...........<span class="_ _1"></span>............<span class="_ _1"></span>...........<span class="_ _1"></span>..<span class="_"> </span>6.25V</div><div class="t m1 x9 h4 y86 ff3 fs2 fc0 sc0 lse ws44">DC Output Current<span class="_ _5"></span>......................<span class="_ _1"></span>...........<span class="_ _1"></span>............<span class="_ _1"></span>...........<span class="_ _d"> </span>5<span class="_ _1"></span>.0 mA</div></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div>

<div id="pf3" class="pf w0 h0" data-page-no="3"><div class="pc pc3 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/622b3c9eff7f9c46a613a896/bg3.jpg"><div class="t m1 x20 h6 y87 ff1 fs4 fc0 sc0 ls1d ws0">AT24C01A/0<span class="_ _5"></span>2/04/08/16</div><div class="t m1 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0">3</div><div class="t m1 x2 h3 y88 ff1 fs1 fc0 sc0 ls51 ws45">Memory O<span class="_ _5"></span>rganization</div><div class="t m1 x2 h2 y89 ff1 fs0 fc0 sc0 ls52 ws36">AT24<span class="_ _1"></span>C01A, <span class="_ _1"></span>1K SERI<span class="_ _1"></span>AL EEPR<span class="_ _1"></span>OM: <span class="_ _1"></span><span class="ff3 ls53 ws29">Intern<span class="_ _5"></span>ally<span class="_ _5"></span> orga<span class="_ _5"></span>nized</span></div><div class="t m1 x2 h2 y8a ff3 fs0 fc0 sc0 ls12 ws29">with 128 pages<span class="_ _5"></span> of 1 byte each, the<span class="_ _5"></span> 1K requires a 7-b<span class="_ _5"></span>it data</div><div class="t m1 x2 h2 y8b ff3 fs0 fc0 sc0 ls54 ws46">word addres<span class="_ _5"></span>s for ran<span class="_ _5"></span>dom word addr<span class="_ _5"></span>essing.</div><div class="t m1 x1c h2 y8c ff1 fs0 fc0 sc0 ls55 ws47">AT24C02, <span class="_ _5"></span>2K SERIAL EE<span class="_ _5"></span>PROM:<span class="ff3 ls19 ws48"> Internal<span class="_ _5"></span>ly organi<span class="_ _5"></span>zed with</span></div><div class="t m1 x1c h2 y8d ff3 fs0 fc0 sc0 ls56 ws49">256 page<span class="_ _5"></span>s of 1-by<span class="_ _5"></span>te each, th<span class="_ _5"></span>e 2K requ<span class="_ _5"></span>ires an 8-<span class="_ _5"></span>bit data</div><div class="t m1 x1c h2 y8e ff3 fs0 fc0 sc0 ls54 ws46">word addre<span class="_ _5"></span>ss for ran<span class="_ _5"></span>dom word <span class="_ _5"></span>addressing.</div><div class="t m1 x1c h2 y8f ff1 fs0 fc0 sc0 ls57 ws4a">AT24C04, 4K <span class="_ _5"></span>SERIAL EEPROM: <span class="_ _5"></span><span class="ff3 ls58 ws4b">The 4K i<span class="_ _5"></span>s interna<span class="_ _5"></span>lly</span></div><div class="t m1 x1c h2 y90 ff3 fs0 fc0 sc0 ls59 ws4c">organiz<span class="_ _5"></span>ed with <span class="_ _5"></span>256 page<span class="_ _5"></span>s of 2 b<span class="_ _5"></span>ytes <span class="_ _5"></span>each. Ra<span class="_ _5"></span>ndom w<span class="_ _5"></span>ord</div><div class="t m1 x1c h2 y91 ff3 fs0 fc0 sc0 ls5a ws12">addressing<span class="_ _1"></span> Chip Numbe<span class="_ _1"></span>r requir<span class="_ _1"></span>es a 9-bi<span class="_ _1"></span>t data <span class="_ _1"></span>word</div><div class="t m1 x1c h2 y92 ff3 fs0 fc0 sc0 ls5b ws0">addres<span class="_ _5"></span>s.</div><div class="t m1 x1c h2 y93 ff1 fs0 fc0 sc0 ls57 ws4a">AT24C08, 8K <span class="_ _5"></span>SERIAL EEPROM: <span class="_ _5"></span><span class="ff3 ls58 ws4b">The 8K i<span class="_ _5"></span>s interna<span class="_ _5"></span>lly</span></div><div class="t m1 x1c h2 y94 ff3 fs0 fc0 sc0 ls19 ws4d">organiz<span class="_ _5"></span>ed with 4<span class="_ _5"></span> blocks of <span class="_ _5"></span>256 pages<span class="_ _5"></span> of 4 byte<span class="_ _5"></span>s each. <span class="_ _5"></span>Ran-</div><div class="t m1 x1c h2 y95 ff3 fs0 fc0 sc0 ls18 ws4e">dom word<span class="_ _5"></span> address<span class="_ _5"></span>ing req<span class="_ _5"></span>uires a 10-<span class="_ _5"></span>bit data w<span class="_ _5"></span>ord addr<span class="_ _5"></span>ess.</div><div class="t m1 x1c h2 y96 ff1 fs0 fc0 sc0 ls5c ws4a">AT24C16, 16K SERIAL E<span class="_ _5"></span>EPROM: <span class="ff3 ls42 ws37">The 16K is in<span class="_ _5"></span>ternally</span></div><div class="t m1 x1c h2 y97 ff3 fs0 fc0 sc0 ls19 ws4d">organiz<span class="_ _5"></span>ed with 8<span class="_ _5"></span> blocks of <span class="_ _5"></span>256 pages<span class="_ _5"></span> of 8 byte<span class="_ _5"></span>s each. <span class="_ _5"></span>Ran-</div><div class="t m1 x1c h2 y98 ff3 fs0 fc0 sc0 ls5d ws4c">dom word<span class="_ _1"></span> addressing r<span class="_ _1"></span>equires an 1<span class="_ _1"></span>1-bit data<span class="_ _1"></span> word</div><div class="t m1 x1c h2 y99 ff3 fs0 fc0 sc0 ls5b ws0">addres<span class="_ _5"></span>s.</div><div class="t m1 x2 h4 y9a ff3 fs2 fc0 sc0 ls5e ws4f">Note:<span class="_ _10"> </span>1.<span class="_ _11"> </span>This par<span class="_ _1"></span>ame<span class="_ _1"></span>ter is cha<span class="_ _1"></span>ract<span class="_ _1"></span>erized and<span class="_ _1"></span> is not 1<span class="_ _1"></span>00% tes<span class="_ _1"></span>ted.</div><div class="t m1 x2 h4 y9b ff3 fs2 fc0 sc0 ls5f ws0">Note:<span class="_ _10"> </span>1.<span class="_ _12"> </span>V</div><div class="t m1 x21 h5 y9c ff3 fs3 fc0 sc0 ls60 ws0">IL</div><div class="t m1 x1a h4 y9b ff3 fs2 fc0 sc0 ls61 ws50"> min an<span class="_ _1"></span>d V</div><div class="t m1 x22 h5 y9c ff3 fs3 fc0 sc0 ls62 ws0">IH </div><div class="t m1 x23 h4 y9b ff3 fs2 fc0 sc0 ls6 ws4">max are<span class="_ _1"></span> ref<span class="_ _1"></span>erenc<span class="_ _1"></span>e only an<span class="_ _1"></span>d are no<span class="_ _1"></span>t tested.</div><div class="t m1 x9 ha y9d ff1 fs8 fc0 sc0 ls63 ws51">WP Pin</div><div class="t m1 x9 ha y9e ff1 fs8 fc0 sc0 ls64 ws0">Status</div><div class="t m1 x24 ha y9f ff1 fs8 fc0 sc0 ls65 ws52">P<span class="_ _1"></span>ar<span class="_ _5"></span>t of the Array Protected</div><div class="t m1 x25 ha y9e ff1 fs8 fc0 sc0 ls66 ws0">24C01A<span class="_ _13"> </span>24C02<span class="_ _14"> </span>24C04<span class="_ _15"> </span>24C08<span class="_ _13"> </span>24C16</div><div class="t m1 x9 ha ya0 ff3 fs8 fc0 sc0 ls67 ws53">At V</div><div class="t m1 x26 hb ya1 ff3 fs9 fc0 sc0 ls68 ws0">CC</div><div class="t m1 x27 ha ya2 ff3 fs8 fc0 sc0 ls69 ws54">Full<span class="_ _5"></span> (1K) </div><div class="t m1 x27 ha ya3 ff3 fs8 fc0 sc0 ls6a ws0">Array</div><div class="t m1 x28 ha ya2 ff3 fs8 fc0 sc0 ls6b ws55">Full (2K) </div><div class="t m1 x28 ha ya3 ff3 fs8 fc0 sc0 ls6a ws0">Array</div><div class="t m1 x29 ha ya2 ff3 fs8 fc0 sc0 ls6c ws56">Full (4K) </div><div class="t m1 x29 ha ya3 ff3 fs8 fc0 sc0 ls6a ws0">Array</div><div class="t m1 x2a ha ya4 ff3 fs8 fc0 sc0 ls6d ws0">Normal<span class="_ _1"></span> </div><div class="t m1 x2a ha ya2 ff3 fs8 fc0 sc0 ls6e ws0">Read/</div><div class="t m1 x2a ha ya3 ff3 fs8 fc0 sc0 ls6f ws0">Write </div><div class="t m1 x2a ha ya5 ff3 fs8 fc0 sc0 ls70 ws0">Operation</div><div class="t m1 x2b ha ya4 ff3 fs8 fc0 sc0 ls71 ws0">Upper </div><div class="t m1 x2b ha ya2 ff3 fs8 fc0 sc0 ls72 ws0">Half</div><div class="t m1 x2b ha ya3 ff3 fs8 fc0 sc0 ls73 ws0">(8K) </div><div class="t m1 x2b ha ya5 ff3 fs8 fc0 sc0 ls6a ws0">Array</div><div class="t m1 x9 ha ya6 ff3 fs8 fc0 sc0 ls70 ws57">At GND<span class="_ _16"> </span>Normal <span class="_ _5"></span>Read/Write Operations</div><div class="t m1 x2 h3 ya7 ff1 fs1 fc0 sc0 ls74 ws58">Pin Capacitance</div><div class="t m1 x2c hc ya8 ff3 fsa fc0 sc0 ls75 ws0">(1)</div><div class="t m1 x2 h2 ya9 ff3 fs0 fc0 sc0 ls14 wsf">Applic<span class="_ _5"></span>able over r<span class="_ _5"></span>ecommen<span class="_ _5"></span>ded opera<span class="_ _5"></span>ting ran<span class="_ _5"></span>ge from T</div><div class="t m1 x2d h8 yaa ff3 fs6 fc0 sc0 ls0 ws0">A</div><div class="t m1 xa h2 ya9 ff3 fs0 fc0 sc0 ls76 ws59"> = 25<span class="ff4 fsb ls0 ws0">°</span><span class="ls77 ws0">C, f = 1.0 MHz,<span class="_ _5"></span> V</span></div><div class="t m1 x2e h8 yaa ff3 fs6 fc0 sc0 ls78 ws0">CC</div><div class="t m1 x2f h2 ya9 ff3 fs0 fc0 sc0 ls76 ws59"> = +1.8V.</div><div class="t m1 x9 h4 yab ff1 fs2 fc0 sc0 ls3 ws3">Symbol<span class="_ _17"> </span>T<span class="_ _3"></span>est Condition<span class="_ _18"> </span>Max<span class="_ _19"> </span>Units<span class="_ _1a"> </span>Conditions</div><div class="t m1 x9 h4 yac ff3 fs2 fc0 sc0 ls0 ws0">C</div><div class="t m1 x30 h5 yad ff3 fs3 fc0 sc0 ls62 ws0">I/O</div><div class="t m1 x5 h4 yae ff3 fs2 fc0 sc0 lsf ws3b">Input/O<span class="_ _1"></span>utput Cap<span class="_ _1"></span>acitance (SD<span class="_ _3"></span>A)<span class="_ _1b"> </span>8<span class="_ _1c"> </span>pF<span class="_ _1d"> </span>V</div><div class="t m1 x31 h5 yad ff3 fs3 fc0 sc0 ls60 ws0">I/O</div><div class="t m1 x32 h4 yae ff3 fs2 fc0 sc0 ls26 ws20"> = 0V</div><div class="t m1 x9 h4 yaf ff3 fs2 fc0 sc0 ls0 ws0">C</div><div class="t m1 x30 h5 yb0 ff3 fs3 fc0 sc0 ls62 ws0">IN</div><div class="t m1 x5 h4 yb1 ff3 fs2 fc0 sc0 ls6 ws4">Input C<span class="_ _1"></span>apacitan<span class="_ _1"></span>ce (A</div><div class="t m1 x33 h5 yb0 ff3 fs3 fc0 sc0 ls0 ws0">0</div><div class="t m1 x34 h4 yb1 ff3 fs2 fc0 sc0 lse ws0">, A</div><div class="t m1 x35 h5 yb0 ff3 fs3 fc0 sc0 ls0 ws0">1</div><div class="t m1 x36 h4 yb1 ff3 fs2 fc0 sc0 lse ws0">, A</div><div class="t m1 x37 h5 yb0 ff3 fs3 fc0 sc0 ls0 ws0">2</div><div class="t m1 x38 h4 yb1 ff3 fs2 fc0 sc0 ls2 ws5a">, SCL)<span class="_ _1e"> </span>6<span class="_ _1c"> </span>pF<span class="_ _1f"> </span>V</div><div class="t m1 x39 h5 yb0 ff3 fs3 fc0 sc0 ls60 ws0">IN</div><div class="t m1 x3a h4 yb1 ff3 fs2 fc0 sc0 ls4d ws5b"> = 0V</div><div class="t m1 x2 h3 yb2 ff1 fs1 fc0 sc0 ls79 ws5c">DC Characteristi<span class="_ _1"></span>cs</div><div class="t m1 x2 h2 yb3 ff3 fs0 fc0 sc0 ls59 ws4c">Applica<span class="_ _5"></span>ble over r<span class="_ _5"></span>ecommended<span class="_ _5"></span> operatin<span class="_ _5"></span>g range fr<span class="_ _5"></span>om: T</div><div class="t m1 x3b h8 yb4 ff3 fs6 fc0 sc0 ls7a ws0">AI</div><div class="t m1 x3c h2 yb3 ff3 fs0 fc0 sc0 ls7b ws5d"> = -40<span class="ff4 fsb ls0 ws0">°</span><span class="ls7c ws5e">C to +85<span class="ff4 fsb ls0 ws0">°<span class="_ _5"></span></span><span class="ws5f">C, V</span></span></div><div class="t m1 x3d h8 yb4 ff3 fs6 fc0 sc0 ls7d ws0">CC</div><div class="t m1 x3e h2 yb3 ff3 fs0 fc0 sc0 ls2a ws60"> = +1.8V to +5.5<span class="_ _5"></span>V, T</div><div class="t m1 x3f h8 yb4 ff3 fs6 fc0 sc0 ls7e ws0">AC</div><div class="t m1 x40 h2 yb3 ff3 fs0 fc0 sc0 ls76 ws61"> = 0<span class="ff4 fsb ls0 ws0">°</span><span class="ls7f ws62">C to +70<span class="ff4 fsb ls0 ws0">°<span class="_"> </span></span><span class="ls29 ws0">C,</span></span></div><div class="t m1 x2 h2 yb5 ff3 fs0 fc0 sc0 ls0 ws0">V</div><div class="t m1 x41 h8 yb6 ff3 fs6 fc0 sc0 ls78 ws0">CC</div><div class="t m1 x42 h2 yb7 ff3 fs0 fc0 sc0 ls14 wsf">=<span class="_"> </span>+1.8V <span class="_ _5"></span>to +5.5V (<span class="_ _5"></span>unless oth<span class="_ _5"></span>erwise n<span class="_ _5"></span>oted).</div><div class="t m1 x9 h4 yb8 ff1 fs2 fc0 sc0 ls80 ws63">Symbol<span class="_ _17"> </span>P<span class="_ _1"></span>arameter<span class="_ _20"> </span>T<span class="_ _3"></span>est Condition<span class="_ _21"> </span>Min<span class="_ _a"> </span>T<span class="_ _3"></span>yp<span class="_ _22"> </span>Max<span class="_ _23"> </span>Units</div><div class="t m1 x9 h4 yb9 ff3 fs2 fc0 sc0 ls0 ws0">V</div><div class="t m1 x30 h5 yba ff3 fs3 fc0 sc0 ls4 ws0">CC1</div><div class="t m1 x5 h4 ybb ff3 fs2 fc0 sc0 ls4f ws42">Supply V<span class="_ _3"></span>o<span class="_ _1"></span>ltage<span class="_ _24"> </span>1.8<span class="_ _25"> </span>5.5<span class="_ _26"> </span>V</div><div class="t m1 x9 h4 ybc ff3 fs2 fc0 sc0 ls0 ws0">V</div><div class="t m1 x30 h5 ybd ff3 fs3 fc0 sc0 ls4 ws0">CC2</div><div class="t m1 x5 h4 ybe ff3 fs2 fc0 sc0 ls4f ws42">Supply V<span class="_ _3"></span>o<span class="_ _1"></span>ltage<span class="_ _24"> </span>2.5<span class="_ _25"> </span>5.5<span class="_ _26"> </span>V</div><div class="t m1 x9 h4 ybf ff3 fs2 fc0 sc0 ls0 ws0">V</div><div class="t m1 x30 h5 yc0 ff3 fs3 fc0 sc0 ls4 ws0">CC3</div><div class="t m1 x5 h4 ybf ff3 fs2 fc0 sc0 ls4f ws42">Supply V<span class="_ _3"></span>o<span class="_ _1"></span>ltage<span class="_ _24"> </span>2.7<span class="_ _25"> </span>5.5<span class="_ _26"> </span>V</div><div class="t m1 x9 h4 yc1 ff3 fs2 fc0 sc0 ls0 ws0">V</div><div class="t m1 x30 h5 yc2 ff3 fs3 fc0 sc0 ls4 ws0">CC4</div><div class="t m1 x5 h4 yc3 ff3 fs2 fc0 sc0 ls4f ws42">Supply V<span class="_ _3"></span>o<span class="_ _1"></span>ltage<span class="_ _24"> </span>4.5<span class="_ _25"> </span>5.5<span class="_ _26"> </span>V</div><div class="t m1 x9 h4 yc4 ff3 fs2 fc0 sc0 ls0 ws0">I</div><div class="t m1 x6 h5 yc5 ff3 fs3 fc0 sc0 ls81 ws0">CC</div><div class="t m1 x5 h4 yc6 ff3 fs2 fc0 sc0 lsf ws3b">Supply C<span class="_ _1"></span>urrent V</div><div class="t m1 x43 h5 yc5 ff3 fs3 fc0 sc0 ls4 ws0">CC</div><div class="t m1 x29 h4 yc6 ff3 fs2 fc0 sc0 ls8 ws6"> = 5.0V<span class="_ _27"> </span>READ at 1<span class="_ _1"></span>00 kHz<span class="_ _28"> </span>0.4<span class="_ _29"> </span>1.0<span class="_ _2a"> </span>mA</div><div class="t m1 x9 h4 yc7 ff3 fs2 fc0 sc0 ls0 ws0">I</div><div class="t m1 x6 h5 yc8 ff3 fs3 fc0 sc0 ls81 ws0">CC</div><div class="t m1 x5 h4 yc9 ff3 fs2 fc0 sc0 lsf ws3b">Supply C<span class="_ _1"></span>urrent V</div><div class="t m1 x43 h5 yc8 ff3 fs3 fc0 sc0 ls4 ws0">CC</div><div class="t m1 x29 h4 yc9 ff3 fs2 fc0 sc0 ls26 ws20"> = 5.0V<span class="_ _27"> </span>WRITE a<span class="_ _1"></span>t 100 kHz<span class="_ _2b"> </span>2.0<span class="_ _29"> </span>3.0<span class="_ _2a"> </span>mA</div><div class="t m1 x9 h4 yca ff3 fs2 fc0 sc0 ls0 ws0">I</div><div class="t m1 x6 h5 ycb ff3 fs3 fc0 sc0 ls82 ws0">SB1</div><div class="t m1 x5 h4 ycc ff3 fs2 fc0 sc0 ls83 ws64">Stan<span class="_ _5"></span>dby Curr<span class="_ _5"></span>ent V</div><div class="t m1 x44 h5 ycb ff3 fs3 fc0 sc0 ls4 ws0">CC</div><div class="t m1 x45 h4 ycc ff3 fs2 fc0 sc0 ls22 ws1d"> = 1.8V<span class="_ _2c"> </span>V</div><div class="t m1 x46 h5 ycb ff3 fs3 fc0 sc0 ls62 ws0">IN</div><div class="t m1 x47 h4 ycc ff3 fs2 fc0 sc0 ls26 ws20"> = V</div><div class="t m1 x48 h5 ycb ff3 fs3 fc0 sc0 ls4 ws0">CC</div><div class="t m1 x49 h4 ycc ff3 fs2 fc0 sc0 ls24 ws1f"> or V</div><div class="t m1 x4a h5 ycb ff3 fs3 fc0 sc0 ls82 ws0">SS</div><div class="t m1 x7 h4 ycc ff3 fs2 fc0 sc0 ls84 ws0">0.6<span class="_ _29"> </span>3.0<span class="_ _2d"> </span>µA</div><div class="t m1 x9 h4 ycd ff3 fs2 fc0 sc0 ls0 ws0">I</div><div class="t m1 x6 h5 yce ff3 fs3 fc0 sc0 ls82 ws0">SB2</div><div class="t m1 x5 h4 ycf ff3 fs2 fc0 sc0 ls83 ws64">Stan<span class="_ _5"></span>dby Curr<span class="_ _5"></span>ent V</div><div class="t m1 x44 h5 yce ff3 fs3 fc0 sc0 ls4 ws0">CC</div><div class="t m1 x45 h4 ycf ff3 fs2 fc0 sc0 ls22 ws1d"> = 2.5V<span class="_ _2c"> </span>V</div><div class="t m1 x46 h5 yce ff3 fs3 fc0 sc0 ls62 ws0">IN</div><div class="t m1 x47 h4 ycf ff3 fs2 fc0 sc0 ls26 ws20"> = V</div><div class="t m1 x48 h5 yce ff3 fs3 fc0 sc0 ls4 ws0">CC</div><div class="t m1 x49 h4 ycf ff3 fs2 fc0 sc0 ls24 ws1f"> or V</div><div class="t m1 x4a h5 yce ff3 fs3 fc0 sc0 ls82 ws0">SS</div><div class="t m1 x7 h4 ycf ff3 fs2 fc0 sc0 ls84 ws0">1.4<span class="_ _29"> </span>4.0<span class="_ _2d"> </span>µA</div><div class="t m1 x9 h4 yd0 ff3 fs2 fc0 sc0 ls0 ws0">I</div><div class="t m1 x6 h5 yd1 ff3 fs3 fc0 sc0 ls82 ws0">SB3</div><div class="t m1 x5 h4 yd2 ff3 fs2 fc0 sc0 ls83 ws64">Stan<span class="_ _5"></span>dby Curr<span class="_ _5"></span>ent V</div><div class="t m1 x44 h5 yd1 ff3 fs3 fc0 sc0 ls4 ws0">CC</div><div class="t m1 x45 h4 yd2 ff3 fs2 fc0 sc0 ls22 ws1d"> = 2.7V<span class="_ _2c"> </span>V</div><div class="t m1 x46 h5 yd1 ff3 fs3 fc0 sc0 ls62 ws0">IN</div><div class="t m1 x47 h4 yd2 ff3 fs2 fc0 sc0 ls26 ws20"> = V</div><div class="t m1 x48 h5 yd1 ff3 fs3 fc0 sc0 ls4 ws0">CC</div><div class="t m1 x49 h4 yd2 ff3 fs2 fc0 sc0 ls24 ws1f"> or V</div><div class="t m1 x4a h5 yd1 ff3 fs3 fc0 sc0 ls82 ws0">SS</div><div class="t m1 x7 h4 yd2 ff3 fs2 fc0 sc0 ls84 ws0">1.6<span class="_ _29"> </span>4.0<span class="_ _2d"> </span>µA</div><div class="t m1 x9 h4 yd3 ff3 fs2 fc0 sc0 ls0 ws0">I</div><div class="t m1 x6 h5 yd4 ff3 fs3 fc0 sc0 ls82 ws0">SB4</div><div class="t m1 x5 h4 yd5 ff3 fs2 fc0 sc0 ls83 ws64">Stan<span class="_ _5"></span>dby Curr<span class="_ _5"></span>ent V</div><div class="t m1 x44 h5 yd4 ff3 fs3 fc0 sc0 ls4 ws0">CC</div><div class="t m1 x45 h4 yd5 ff3 fs2 fc0 sc0 ls22 ws1d"> = 5.0V<span class="_ _2c"> </span>V</div><div class="t m1 x46 h5 yd4 ff3 fs3 fc0 sc0 ls62 ws0">IN</div><div class="t m1 x47 h4 yd5 ff3 fs2 fc0 sc0 ls26 ws20"> = V</div><div class="t m1 x48 h5 yd4 ff3 fs3 fc0 sc0 ls4 ws0">CC</div><div class="t m1 x49 h4 yd5 ff3 fs2 fc0 sc0 ls24 ws1f"> or V</div><div class="t m1 x4a h5 yd4 ff3 fs3 fc0 sc0 ls82 ws0">SS</div><div class="t m1 x7 h4 yd5 ff3 fs2 fc0 sc0 ls21 ws0">8.0<span class="_ _2e"> </span>18.0<span class="_ _2f"> </span>µA</div><div class="t m1 x9 h4 yd6 ff3 fs2 fc0 sc0 ls0 ws0">I</div><div class="t m1 x6 h5 yd7 ff3 fs3 fc0 sc0 ls85 ws0">LI</div><div class="t m1 x5 h4 yd8 ff3 fs2 fc0 sc0 ls4f ws42">Input Le<span class="_ _1"></span>akage<span class="_ _1"></span> Current<span class="_ _30"> </span>V</div><div class="t m1 x46 h5 yd7 ff3 fs3 fc0 sc0 ls62 ws0">IN</div><div class="t m1 x47 h4 yd8 ff3 fs2 fc0 sc0 ls26 ws20"> = V</div><div class="t m1 x48 h5 yd7 ff3 fs3 fc0 sc0 ls4 ws0">CC</div><div class="t m1 x49 h4 yd8 ff3 fs2 fc0 sc0 ls24 ws1f"> or V</div><div class="t m1 x4a h5 yd7 ff3 fs3 fc0 sc0 ls82 ws0">SS</div><div class="t m1 x4b h4 yd8 ff3 fs2 fc0 sc0 ls84 ws0">0.10<span class="_ _2e"> </span>3.0<span class="_ _2d"> </span>µA</div><div class="t m1 x9 h4 yd9 ff3 fs2 fc0 sc0 ls0 ws0">I</div><div class="t m1 x6 h5 yda ff3 fs3 fc0 sc0 ls85 ws0">LO</div><div class="t m1 x5 h4 yd9 ff3 fs2 fc0 sc0 ls5e ws65">Output Lea<span class="_ _1"></span>kage Curren<span class="_ _1"></span>t<span class="_ _31"> </span>V</div><div class="t m1 x46 h5 yda ff3 fs3 fc0 sc0 ls62 ws0">OUT</div><div class="t m1 x2b h4 yd9 ff3 fs2 fc0 sc0 ls26 ws20"> = V</div><div class="t m1 xb h5 yda ff3 fs3 fc0 sc0 ls4 ws0">CC </div><div class="t m1 x4c h4 yd9 ff3 fs2 fc0 sc0 ls24 ws1f">or V</div><div class="t m1 x4d h5 yda ff3 fs3 fc0 sc0 ls82 ws0">SS</div><div class="t m1 x4b h4 yd9 ff3 fs2 fc0 sc0 ls84 ws0">0.05<span class="_ _2e"> </span>3.0<span class="_ _2d"> </span>µA</div><div class="t m1 x9 h4 ydb ff3 fs2 fc0 sc0 ls0 ws0">V</div><div class="t m1 x30 h5 ydc ff3 fs3 fc0 sc0 ls62 ws0">IL</div><div class="t m1 x5 h4 ydd ff3 fs2 fc0 sc0 ls4d ws66">Input Lo<span class="_ _1"></span>w Le<span class="_ _3"></span>vel</div><div class="t m1 x4e h5 yde ff3 fs3 fc0 sc0 ls86 ws0">(1)</div><div class="t m1 x4f h4 ydd ff3 fs2 fc0 sc0 ls87 ws0">-0.6<span class="_ _32"> </span>V</div><div class="t m1 x50 h5 ydc ff3 fs3 fc0 sc0 ls4 ws0">CC</div><div class="t m1 x51 h4 ydd ff3 fs2 fc0 sc0 ls49 ws3d"> x 0.3<span class="_ _33"> </span>V</div><div class="t m1 x9 h4 ydf ff3 fs2 fc0 sc0 ls0 ws0">V</div><div class="t m1 x30 h5 ye0 ff3 fs3 fc0 sc0 ls62 ws0">IH</div><div class="t m1 x5 h4 ye1 ff3 fs2 fc0 sc0 ls6 ws4">Input H<span class="_ _1"></span>igh Le<span class="_ _1"></span>v<span class="_ _1"></span>el</div><div class="t m1 x52 h5 ye2 ff3 fs3 fc0 sc0 ls88 ws0">(1)</div><div class="t m1 x53 h4 ye1 ff3 fs2 fc0 sc0 ls0 ws0">V</div><div class="t m1 x54 h5 ye0 ff3 fs3 fc0 sc0 ls4 ws0">CC</div><div class="t m1 x55 h4 ye1 ff3 fs2 fc0 sc0 ls49 ws3d"> x 0.7<span class="_ _34"> </span>V</div><div class="t m1 x50 h5 ye0 ff3 fs3 fc0 sc0 ls81 ws0">CC</div><div class="t m1 x51 h4 ye1 ff3 fs2 fc0 sc0 ls26 ws20"> + 0.5<span class="_ _33"> </span>V</div><div class="t m1 x9 h4 ye3 ff3 fs2 fc0 sc0 ls0 ws0">V</div><div class="t m1 x56 h5 ye4 ff3 fs3 fc0 sc0 ls62 ws0">OL2</div><div class="t m1 x5 h4 ye5 ff3 fs2 fc0 sc0 ls84 ws67">Output <span class="_ _1"></span>Low L<span class="_ _1"></span>ev<span class="_ _3"></span>el V</div><div class="t m1 x57 h5 ye4 ff3 fs3 fc0 sc0 ls4 ws0">CC</div><div class="t m1 x34 h4 ye5 ff3 fs2 fc0 sc0 ls89 ws68"> = 3.0V<span class="_ _1a"> </span>I</div><div class="t m1 x58 h5 ye4 ff3 fs3 fc0 sc0 ls60 ws0">OL</div><div class="t m1 xd h4 ye5 ff3 fs2 fc0 sc0 ls22 ws1d"> = 2.1 mA<span class="_ _35"> </span>0.4<span class="_ _26"> </span>V</div><div class="t m1 x9 h4 ye6 ff3 fs2 fc0 sc0 ls0 ws0">V</div><div class="t m1 x56 h5 ye7 ff3 fs3 fc0 sc0 ls62 ws0">OL1</div><div class="t m1 x5 h4 ye8 ff3 fs2 fc0 sc0 ls84 ws67">Output <span class="_ _1"></span>Low L<span class="_ _1"></span>ev<span class="_ _3"></span>el V</div><div class="t m1 x57 h5 ye7 ff3 fs3 fc0 sc0 ls4 ws0">CC</div><div class="t m1 x34 h4 ye8 ff3 fs2 fc0 sc0 ls89 ws68"> = 1.8V<span class="_ _1a"> </span>I</div><div class="t m1 x58 h5 ye7 ff3 fs3 fc0 sc0 ls60 ws0">OL</div><div class="t m1 xd h4 ye8 ff3 fs2 fc0 sc0 ls4b ws3f"> = 0.15 <span class="_ _1"></span>mA<span class="_ _36"> </span>0.2<span class="_ _26"> </span>V</div><a class="l" rel='nofollow' onclick='return false;'><div class="d m2"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m2"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m2"></div></a></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div>

<div id="pf4" class="pf w0 h0" data-page-no="4"><div class="pc pc4 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/622b3c9eff7f9c46a613a896/bg4.jpg"><div class="t m1 x1a h6 y57 ff1 fs4 fc0 sc0 ls1e ws0">AT24C01A/02<span class="_ _5"></span>/04/08/16</div><div class="t m1 x1b h2 y1 ff1 fs0 fc0 sc0 ls0 ws0">4</div><div class="t m1 x2 h4 ye9 ff3 fs2 fc0 sc0 ls8a ws69">Note<span class="_ _5"></span>:<span class="_ _10"> </span>1.<span class="_ _12"> </span>Thi<span class="_ _5"></span>s param<span class="_ _5"></span>eter<span class="_ _5"></span> is ch<span class="_ _5"></span>aracte<span class="_ _5"></span>ri<span class="_ _5"></span>zed and i<span class="_ _5"></span>s not<span class="_ _5"></span> 100% t<span class="_ _5"></span>ested<span class="_ _5"></span>.</div><div class="t m1 x2 h3 yea ff1 fs1 fc0 sc0 ls8b ws6a">Devi<span class="_ _1"></span>ce Operation</div><div class="t m1 x2 h2 yeb ff1 fs0 fc0 sc0 ls8c ws6b">CLOCK and D<span class="_ _1"></span>A<span class="_ _3"></span>T<span class="_ _37"></span>A TRANSITIONS:<span class="ff3 ls53 ws29"> The S<span class="_ _5"></span>DA pin i<span class="_ _5"></span>s nor-</span></div><div class="t m1 x2 h2 yec ff3 fs0 fc0 sc0 ls12 ws29">mally pulled<span class="_ _5"></span> high with an externa<span class="_ _5"></span>l device. Data on the SDA</div><div class="t m1 x2 h2 yed ff3 fs0 fc0 sc0 ls12 ws29">pin ma<span class="_ _5"></span>y ch<span class="_ _5"></span>ange o<span class="_ _5"></span>nly d<span class="_ _5"></span>uring S<span class="_ _5"></span>CL low<span class="_ _5"></span> tim<span class="_ _5"></span>e per<span class="_ _5"></span>iods (<span class="_ _5"></span>refer t<span class="_ _5"></span>o</div><div class="t m1 x2 h2 yee ff3 fs0 fc0 sc0 ls8d ws29">Data Validity timing dia<span class="_ _5"></span>gram). Data changes during S<span class="_ _5"></span>CL</div><div class="t m1 x2 h2 yef ff3 fs0 fc0 sc0 ls8e ws6c">high periods will indicate a start or<span class="_ _5"></span> stop condition as</div><div class="t m1 x2 h2 yf0 ff3 fs0 fc0 sc0 ls14 wsf">define<span class="_ _5"></span>d below.</div><div class="t m1 x2 h2 yf1 ff1 fs0 fc0 sc0 ls8f ws6d">ST<span class="_ _37"></span>ART CONDITION:<span class="_ _1"></span><span class="ff3 ls16 ws6e"> A high-to-l<span class="_ _5"></span>ow transition of S<span class="_ _5"></span>DA with</span></div><div class="t m1 x2 h2 yf2 ff3 fs0 fc0 sc0 ls90 ws6f">SCL high is<span class="_ _5"></span> a start co<span class="_ _5"></span>ndition which <span class="_ _5"></span>must precede any</div><div class="t m1 x2 h2 yf3 ff3 fs0 fc0 sc0 ls8d ws12">other<span class="_ _38"> </span>command (refer to S<span class="_ _5"></span>tart and Stop Definition timing</div><div class="t m1 x2 h2 yf4 ff3 fs0 fc0 sc0 ls3c ws0">diagram<span class="_ _5"></span>).</div><div class="t m1 x2 h2 yf5 ff1 fs0 fc0 sc0 ls91 ws70">ST<span class="_ _3"></span>OP CONDITION:<span class="ff3 ls41 ws36"> A low-to-high transition of SDA <span class="_ _5"></span>with</span></div><div class="t m1 x2 h2 yf6 ff3 fs0 fc0 sc0 ls41 ws36">SCL high is a stop condition. After a read sequence, the</div><div class="t m1 x2 h2 yf7 ff3 fs0 fc0 sc0 ls92 ws71">stop <span class="_ _5"></span>command<span class="_ _5"></span> will p<span class="_ _5"></span>lace th<span class="_ _5"></span>e EEPR<span class="_ _5"></span>OM in <span class="_ _5"></span>a standb<span class="_ _5"></span>y po<span class="_ _5"></span>wer</div><div class="t m1 x2 h2 yf8 ff3 fs0 fc0 sc0 ls93 ws72">mode (refer<span class="_ _5"></span> to Star<span class="_ _5"></span>t and Stop <span class="_ _5"></span>Definition ti<span class="_ _5"></span>ming diag<span class="_ _5"></span>ram).</div><div class="t m1 x1c h2 yf9 ff1 fs0 fc0 sc0 ls94 ws0">A<span class="_ _1"></span>CKNO<span class="_ _1"></span>WLE<span class="_ _5"></span>DGE:<span class="ff3 ls95 ws73"> All addresses and data words are ser<span class="_ _1"></span>i-</span></div><div class="t m1 x1c h2 yfa ff3 fs0 fc0 sc0 ls3f ws28">ally transmitted to and from th<span class="_ _1"></span>e EEPROM in 8-bit words.</div><div class="t m1 x1c h2 yfb ff3 fs0 fc0 sc0 ls96 ws6f">The EEPR<span class="_ _5"></span>OM sends <span class="_ _5"></span>a zero to ack<span class="_ _5"></span>nowledge that i<span class="_ _5"></span>t has</div><div class="t m1 x1c h2 yfc ff3 fs0 fc0 sc0 ls42 ws37">received each<span class="_ _1"></span> word. This hap<span class="_ _1"></span>pens during t<span class="_ _1"></span>he ninth cl<span class="_ _1"></span>ock</div><div class="t m1 x1c h2 yfd ff3 fs0 fc0 sc0 ls97 ws0">cycl<span class="_ _1"></span>e.</div><div class="t m1 x1c h2 yfe ff1 fs0 fc0 sc0 ls29 ws24">ST<span class="_ _4"></span>ANDBY MO<span class="_ _1"></span>DE:<span class="ff3 ls98 ws29"> <span class="_ _1"></span>The AT2<span class="_ _1"></span>4C01A/0<span class="_ _1"></span>2/04/<span class="_ _1"></span>08/16 f<span class="_ _1"></span>eatu<span class="_ _1"></span>res a</span></div><div class="t m1 x1c h2 yff ff3 fs0 fc0 sc0 ls99 ws11">low-power<span class="_ _5"></span> standby mode which is<span class="_ _5"></span> enabled: (a) upon</div><div class="t m1 x1c h2 y100 ff3 fs0 fc0 sc0 ls9a ws12">power<span class="_ _1"></span>-up and <span class="_ _1"></span>(b) af<span class="_ _1"></span>ter th<span class="_ _1"></span>e receipt<span class="_ _1"></span> of the ST<span class="_ _1"></span>OP bit a<span class="_ _1"></span>nd the</div><div class="t m1 x1c h2 y101 ff3 fs0 fc0 sc0 ls19 ws15">completi<span class="_ _5"></span>on of any<span class="_ _5"></span> internal op<span class="_ _5"></span>erations<span class="_ _5"></span>.</div><div class="t m1 x1c h2 y102 ff1 fs0 fc0 sc0 ls97 ws74">MEMORY RESET:<span class="ff3 ls59 ws4c"> Aft<span class="_ _1"></span>er an int<span class="_ _1"></span>erruption <span class="_ _1"></span>in protoco<span class="_ _1"></span>l, powe<span class="_ _1"></span>r</span></div><div class="t m1 x1c h2 y103 ff3 fs0 fc0 sc0 ls9b ws75">loss or sys<span class="_ _5"></span>tem reset, any 2-<span class="_ _5"></span>wire part ca<span class="_ _5"></span>n be reset by follow-</div><div class="t m1 x1c h2 y104 ff3 fs0 fc0 sc0 ls18 ws4e">ing thes<span class="_ _5"></span>e steps:</div><div class="t m1 x1c h2 y105 ff3 fs0 fc0 sc0 ls9c ws76">1.<span class="_ _39"> </span>Clock up to 9 c<span class="_ _5"></span>ycles.</div><div class="t m1 x1c h2 y106 ff3 fs0 fc0 sc0 ls9d ws77">2.<span class="_ _39"> </span>Look for SDA high in ea<span class="_ _5"></span>ch cyc<span class="_ _5"></span>le while S<span class="_ _5"></span>CL is hi<span class="_ _5"></span>gh.</div><div class="t m1 x1c h2 y107 ff3 fs0 fc0 sc0 ls3c ws39">3.<span class="_ _39"> </span>Create a s<span class="_ _5"></span>tar<span class="_ _5"></span>t co<span class="_ _5"></span>ndition.</div><div class="t m1 x2 h3 y79 ff1 fs1 fc0 sc0 ls9e ws78">A<span class="_ _3"></span>C<span class="_ _5"></span> Char<span class="_ _5"></span>act<span class="_ _5"></span>erist<span class="_ _5"></span>ics</div><div class="t m1 x2 h2 y108 ff3 fs0 fc0 sc0 ls16 ws6e">Applicabl<span class="_ _5"></span>e over rec<span class="_ _5"></span>ommended operati<span class="_ _5"></span>ng range from <span class="_ _5"></span>T</div><div class="t m1 x59 h8 y109 ff3 fs6 fc0 sc0 ls7a ws0">A </div><div class="t m1 x5a h2 y108 ff3 fs0 fc0 sc0 ls9f ws79">= -40<span class="ff4 fsb ls0 ws0">°<span class="_ _5"></span></span><span class="ls7c ws5e">C to +85<span class="ff4 fsb ls0 ws0">°</span><span class="ws5f">C, V</span></span></div><div class="t m1 x4f h8 y109 ff3 fs6 fc0 sc0 ls7d ws0">CC</div><div class="t m1 x5b h2 y108 ff3 fs0 fc0 sc0 lsa0 wsd"> = +1.8V<span class="_ _5"></span> to +5.5V, <span class="_ _5"></span>CL = 1 TTL <span class="_ _5"></span>Gate and</div><div class="t m1 x2 h2 y10a ff3 fs0 fc0 sc0 ls3e ws33">100<span class="_"> </span>pF (un<span class="_ _5"></span>less oth<span class="_ _5"></span>erwise n<span class="_ _5"></span>oted).</div><div class="t m1 x9 h4 y10b ff1 fs2 fc0 sc0 lsa1 ws0">Symbol<span class="_ _3a"> </span>P<span class="_ _1"></span>arameter</div><div class="t m1 x5c h4 y10c ff1 fs2 fc0 sc0 lsa1 ws20">2.7-, 2.<span class="_ _1"></span>5-, 1.8-v<span class="_ _1"></span>olt<span class="_ _8"> </span>5.<span class="_ _1"></span>0-v<span class="_ _1"></span>olt</div><div class="t m1 x5d h4 y10b ff1 fs2 fc0 sc0 lsa ws0">Units<span class="_ _3b"></span><span class="ls49">Min<span class="_ _3c"> </span>Max<span class="_ _3c"> </span>Min<span class="_ _3c"> </span>Max</span></div><div class="t m1 x9 h4 y10d ff3 fs2 fc0 sc0 ls0 ws0">f</div><div class="t m1 x6 h5 y10e ff3 fs3 fc0 sc0 ls82 ws0">SCL</div><div class="t m1 x5e h4 y10f ff3 fs2 fc0 sc0 lsa2 ws7a">Cloc<span class="_ _1"></span>k F<span class="_ _1"></span>re<span class="_ _1"></span>quenc<span class="_ _1"></span>y<span class="_ _37"></span>, SCL<span class="_ _3d"> </span>100<span class="_ _3e"> </span>400<span class="_ _3f"> </span>kHz</div><div class="t m1 x9 h4 y110 ff3 fs2 fc0 sc0 ls0 ws0">t</div><div class="t m1 x6 h5 y111 ff3 fs3 fc0 sc0 ls85 ws0">LOW</div><div class="t m1 x5e h4 y112 ff3 fs2 fc0 sc0 ls4b ws3f">Cloc<span class="_ _1"></span>k Puls<span class="_ _1"></span>e Wid<span class="_ _1"></span>th Low<span class="_ _40"> </span>4.7<span class="_ _41"> </span>1.2<span class="_ _42"> </span>µs</div><div class="t m1 x9 h4 y88 ff3 fs2 fc0 sc0 ls0 ws0">t</div><div class="t m1 x6 h5 y113 ff3 fs3 fc0 sc0 ls60 ws0">HIGH</div><div class="t m1 x5e h4 y88 ff3 fs2 fc0 sc0 ls4b ws3f">Cloc<span class="_ _1"></span>k Puls<span class="_ _1"></span>e Wid<span class="_ _1"></span>th High<span class="_ _43"> </span>4.0<span class="_ _41"> </span>0.6<span class="_ _42"> </span>µs</div><div class="t m1 x9 h4 y114 ff3 fs2 fc0 sc0 ls0 ws0">t</div><div class="t m1 x6 h5 y115 ff3 fs3 fc0 sc0 ls0 ws0">I</div><div class="t m1 x5e h4 y116 ff3 fs2 fc0 sc0 lsa3 ws7b">Nois<span class="_ _5"></span>e Supp<span class="_ _5"></span>ressio<span class="_ _5"></span>n Time</div><div class="t m1 x38 h5 y117 ff3 fs3 fc0 sc0 ls88 ws0">(1)</div><div class="t m1 x1d h4 y116 ff3 fs2 fc0 sc0 lsa2 ws0">100<span class="_ _41"> </span>50<span class="_ _44"> </span>ns</div><div class="t m1 x9 h4 y118 ff3 fs2 fc0 sc0 ls0 ws0">t</div><div class="t m1 x6 h5 y119 ff3 fs3 fc0 sc0 ls82 ws0">AA</div><div class="t m1 x5e h4 y11a ff3 fs2 fc0 sc0 ls4e ws41">Cloc<span class="_ _1"></span>k Low <span class="_ _1"></span>to Data Out<span class="_ _1"></span> V<span class="_ _3"></span>alid<span class="_ _45"> </span>0.1<span class="_ _46"> </span>4.5<span class="_ _46"> </span>0.1<span class="_ _46"> </span>0.9<span class="_ _33"> </span>µs</div><div class="t m1 x9 h4 y11b ff3 fs2 fc0 sc0 ls0 ws0">t</div><div class="t m1 x6 h5 y11c ff3 fs3 fc0 sc0 lsa4 ws0">BUF</div><div class="t m1 x5e h4 y11d ff3 fs2 fc0 sc0 ls4a ws7c">Time th<span class="_ _1"></span>e b<span class="_ _1"></span>us mu<span class="_ _1"></span>st be f<span class="_ _1"></span>ree bef<span class="_ _3"></span>ore </div><div class="t m1 x5e h4 y11e ff3 fs2 fc0 sc0 ls61 ws50">a ne<span class="_ _1"></span>w tr<span class="_ _1"></span>ansmis<span class="_ _1"></span>sion <span class="_ _1"></span>can st<span class="_ _1"></span>ar<span class="_ _5"></span>t</div><div class="t m1 x5f h5 y11f ff3 fs3 fc0 sc0 ls88 ws0">(1)</div><div class="t m1 x1f h4 y11d ff3 fs2 fc0 sc0 ls24 ws0">4.7<span class="_ _47"> </span>1.2<span class="_ _48"> </span>µs</div><div class="t m1 x9 h4 y120 ff3 fs2 fc0 sc0 ls0 ws0">t</div><div class="t m1 x6 h5 y121 ff3 fs3 fc0 sc0 lsa5 ws0">HD.ST<span class="_ _3"></span>A</div><div class="t m1 x5e h4 y120 ff3 fs2 fc0 sc0 lse ws0">Start Hold Time<span class="_ _49"> </span>4.0<span class="_ _41"> </span>0.6<span class="_ _42"> </span>µs</div><div class="t m1 x9 h4 y122 ff3 fs2 fc0 sc0 ls0 ws0">t</div><div class="t m1 x6 h5 y123 ff3 fs3 fc0 sc0 lsa6 ws0">SU<span class="_ _1"></span>.ST<span class="_ _37"></span>A</div><div class="t m1 x5e h4 y124 ff3 fs2 fc0 sc0 lsa1 ws7d">Start Setup Time<span class="_ _4a"> </span>4.7<span class="_ _41"> </span>0.6<span class="_ _42"> </span>µs</div><div class="t m1 x9 h4 y125 ff3 fs2 fc0 sc0 ls0 ws0">t</div><div class="t m1 x6 h5 y126 ff3 fs3 fc0 sc0 lsa5 ws0">HD.D<span class="_ _1"></span>A<span class="_ _3"></span>T</div><div class="t m1 x5e h4 y127 ff3 fs2 fc0 sc0 lsa7 ws7e">Data In Hol<span class="_ _1"></span>d Time<span class="_ _4b"> </span>0<span class="_ _4c"> </span>0<span class="_ _4d"> </span>µs</div><div class="t m1 x9 h4 y128 ff3 fs2 fc0 sc0 ls0 ws0">t</div><div class="t m1 x6 h5 y129 ff3 fs3 fc0 sc0 lsa8 ws0">SU<span class="_ _1"></span>.D<span class="_ _1"></span>A<span class="_ _37"></span>T</div><div class="t m1 x5e h4 y12a ff3 fs2 fc0 sc0 ls22 ws1d">Data In<span class="_ _1"></span> Setup Tim<span class="_ _1"></span>e<span class="_ _4e"> </span>200<span class="_ _3e"> </span>100<span class="_ _47"> </span>ns</div><div class="t m1 x9 h4 y12b ff3 fs2 fc0 sc0 ls0 ws0">t</div><div class="t m1 x6 h5 y12c ff3 fs3 fc0 sc0 ls0 ws0">R</div><div class="t m1 x5e h4 y12b ff3 fs2 fc0 sc0 ls49 ws3d">Input<span class="_ _1"></span>s Rise<span class="_ _1"></span> Time</div><div class="t m1 x60 h5 y12d ff3 fs3 fc0 sc0 ls88 ws0">(1)</div><div class="t m1 x61 h4 y12b ff3 fs2 fc0 sc0 lsa9 ws0">1.0<span class="_ _47"> </span>0.3<span class="_ _4f"> </span>µs</div><div class="t m1 x9 h4 y12e ff3 fs2 fc0 sc0 ls0 ws0">t</div><div class="t m1 x6 h5 y12f ff3 fs3 fc0 sc0 ls0 ws0">F</div><div class="t m1 x5e h4 y130 ff3 fs2 fc0 sc0 lsaa ws7f">Input<span class="_ _1"></span>s F<span class="_ _1"></span>a<span class="_ _1"></span>ll Time</div><div class="t m1 x62 h5 y131 ff3 fs3 fc0 sc0 ls88 ws0">(1)</div><div class="t m1 x1d h4 y130 ff3 fs2 fc0 sc0 lsa2 ws0">300<span class="_ _3e"> </span>300<span class="_ _46"> </span>ns</div><div class="t m1 x9 h4 y132 ff3 fs2 fc0 sc0 ls0 ws0">t</div><div class="t m1 x6 h5 y133 ff3 fs3 fc0 sc0 lsa6 ws0">SU<span class="_ _1"></span>.ST<span class="_ _1"></span>O</div><div class="t m1 x5e h4 y134 ff3 fs2 fc0 sc0 lsab ws80">Stop<span class="_ _5"></span> Setup T<span class="_ _5"></span>ime<span class="_ _50"> </span>4.7<span class="_ _47"> </span>0.6<span class="_ _48"> </span>µs</div><div class="t m1 x9 h4 y135 ff3 fs2 fc0 sc0 ls0 ws0">t</div><div class="t m1 x6 h5 y136 ff3 fs3 fc0 sc0 ls81 ws0">DH</div><div class="t m1 x5e h4 y135 ff3 fs2 fc0 sc0 ls5e ws4f">Data Out <span class="_ _1"></span>Hold Tim<span class="_ _1"></span>e<span class="_ _51"> </span>100<span class="_ _41"> </span>50<span class="_ _52"> </span>ns</div><div class="t m1 x9 h4 y137 ff3 fs2 fc0 sc0 ls0 ws0">t</div><div class="t m1 x6 h5 y138 ff3 fs3 fc0 sc0 lsac ws0">WR</div><div class="t m1 x5e h4 y139 ff3 fs2 fc0 sc0 lsa2 ws7a">Write Cycle Tim<span class="_ _1"></span>e<span class="_ _53"> </span>10<span class="_ _54"> </span>10<span class="_ _33"> </span>ms</div><div class="t m1 x9 h4 y13a ff3 fs2 fc0 sc0 ls5e ws0">Endur<span class="_ _1"></span>ance</div><div class="t m1 x63 h5 y13b ff3 fs3 fc0 sc0 ls86 ws0">(1)</div><div class="t m1 x5e h4 y13c ff3 fs2 fc0 sc0 ls6 ws4">5.0V<span class="_ _4"></span>, 25<span class="ff4 ls0 ws0">°</span><span class="ls9 ws7">C<span class="_ _1"></span>, Byte Mod<span class="_ _1"></span>e<span class="_ _55"> </span>1M<span class="_ _41"> </span>1M<span class="_ _56"> </span>Write </span></div><div class="t m1 x64 h4 y13d ff3 fs2 fc0 sc0 lsad ws0">Cycles</div><a class="l" rel='nofollow' onclick='return false;'><div class="d m2"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m2"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m2"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m2"></div></a><a class="l" rel='nofollow' onclick='return false;'><div class="d m2"></div></a></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div>