EJSR_83_1_05.zip

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Journal on transistor level design of cmos
EJSR_83_1_05.zip
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<html xmlns="http://www.w3.org/1999/xhtml"> <head> <meta charset="utf-8"> <meta name="generator" content="pdf2htmlEX"> <meta http-equiv="X-UA-Compatible" content="IE=edge,chrome=1"> <link rel="stylesheet" href="https://static.pudn.com/base/css/base.min.css"> <link rel="stylesheet" href="https://static.pudn.com/base/css/fancy.min.css"> <link rel="stylesheet" href="https://static.pudn.com/prod/directory_preview_static/622ba43e15da9b288b070745/raw.css"> <script src="https://static.pudn.com/base/js/compatibility.min.js"></script> <script src="https://static.pudn.com/base/js/pdf2htmlEX.min.js"></script> <script> try{ pdf2htmlEX.defaultViewer = new pdf2htmlEX.Viewer({}); }catch(e){} </script> <title></title> </head> <body> <div id="sidebar" style="display: none"> <div id="outline"> </div> </div> <div id="pf1" class="pf w0 h0" data-page-no="1"><div class="pc pc1 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/622ba43e15da9b288b070745/bg1.jpg"><div class="t m0 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0">European Journal of Scientific Research </div><div class="t m0 x1 h2 y2 ff1 fs0 fc0 sc0 ls1 ws1">ISSN 1450-216X Vol.83 No.1 (2012), pp.39-52 </div><div class="t m0 x1 h2 y3 ff1 fs0 fc0 sc0 ls1 ws1">&#169; EuroJournals Publishing, Inc. 2012 </div><div class="t m0 x1 h2 y4 ff1 fs0 fc1 sc0 ls2 ws2">http://www.europeanjournalo<span class="ls1">fscientificresearch.com </span></div><div class="t m0 x2 h3 y5 ff1 fs1 fc0 sc0 ls3 ws2"> </div><div class="t m0 x3 h4 y6 ff2 fs1 fc0 sc0 ls4 ws3">Area and Power Efficient Hybrid PTCSL MUX Design </div><div class="t m0 x2 h2 y7 ff1 fs0 fc0 sc0 ls3 ws2"> </div><div class="t m0 x2 h2 y8 ff1 fs0 fc0 sc0 ls3 ws2"> </div><div class="t m0 x4 h5 y9 ff2 fs0 fc0 sc0 ls0 ws0">S. Vijayakumar </div><div class="t m0 x5 h6 ya ff3 fs0 fc0 sc0 ls4 ws4">Department of Electronics <span class="ls1 ws5">and Communication Engineering </span></div><div class="t m0 x6 h6 yb ff3 fs0 fc0 sc0 ls2 ws6">Ganadipathy Tulsi&#8217;s Jain Engineering College, Vellore </div><div class="t m0 x7 h6 yc ff3 fs0 fc0 sc0 ls3 ws2">Tamil Nadu, India &#8211; 632102 </div><div class="t m0 x8 h2 yd ff1 fs0 fc0 sc0 ls5 ws7">E-mail: vijaysuresh1975@yahoo.com </div><div class="t m0 x9 h2 ye ff1 fs0 fc0 sc0 ls3 ws2">Tel: +91-9994238301 </div><div class="t m0 x2 h2 yf ff1 fs0 fc0 sc0 ls3 ws2"> </div><div class="t m0 xa h5 y10 ff2 fs0 fc0 sc0 ls3 ws2">Reeba Korah </div><div class="t m0 x5 h6 y11 ff3 fs0 fc0 sc0 ls4 ws4">Department of Electronics <span class="ls1 ws5">and Communication Engineering </span></div><div class="t m0 xb h6 y12 ff3 fs0 fc0 sc0 ls6 ws8">St. Joseph&#8217;s College of Engineer<span class="ls2 ws9">ing, Chennai, Tamil Nadu, India &#8211; 600119 </span></div><div class="t m0 xc h2 y13 ff1 fs0 fc0 sc0 ls7 ws6">E-mail: reeba26in@gm<span class="_ _0"></span>ail.com </div><div class="t m0 x9 h2 y14 ff1 fs0 fc0 sc0 ls3 ws2">Tel: +91-9176630973 </div><div class="t m0 x2 h7 y15 ff1 fs2 fc0 sc0 ls3 ws2"> </div><div class="t m0 x2 h7 y16 ff1 fs2 fc0 sc0 ls3 ws2"> </div><div class="t m0 xd h5 y17 ff2 fs0 fc0 sc0 ls8 ws2">Abstract </div><div class="t m0 x1 h2 y18 ff1 fs0 fc0 sc0 ls3 ws2"> </div><div class="t m0 xe h2 y19 ff1 fs0 fc0 sc0 ls9 wsa">Multiplexer (MUX) is the most popular de<span class="ls2 wsb">sign which is well known to all as a </span></div><div class="t m0 xf h2 y1a ff1 fs0 fc0 sc0 lsa wsc">switch. It consumes considerable portions of<span class="ls0 wsd"> power among the blocks of an ALU which is </span></div><div class="t m0 xf h2 y1b ff1 fs0 fc0 sc0 ls5 wse">the heart of any digital design right from <span class="lsb wsf">a large super computer to a small gadget. </span></div><div class="t m0 xf h2 y1c ff1 fs0 fc0 sc0 ls9 ws10">Different approaches exist to optimize the MUX by m<span class="_ _0"></span>eans of power, area and speed. The </div><div class="t m0 xf h2 y1d ff1 fs0 fc0 sc0 ls2 ws11">comparison of area between conventional MUX,<span class="ls4 ws12"> com<span class="_ _0"></span>bination of transmission gate and </span></div><div class="t m0 xf h2 y1e ff1 fs0 fc0 sc0 ls3 ws13">static method as a hybrid style, transmission ga<span class="lsc ws14">te logic style are pres<span class="ls8 ws15">ented in this paper. </span></span></div><div class="t m0 xf h2 y1f ff1 fs0 fc0 sc0 lsd ws16">The TGCSL MUX consumes nearly 20% lower <span class="_ _0"></span><span class="ls4 ws17">power than the other two styles (C2MOS, </span></div><div class="t m0 xf h2 y20 ff1 fs0 fc0 sc0 ls4 ws18">TGL) at VDD &lt; 1V. Though the TGL MUX operat<span class="ls3 ws19">es with less power than the other two </span></div><div class="t m0 xf h2 y21 ff1 fs0 fc0 sc0 ls3 ws1a">logic styles, it fails to produ<span class="ls2 ws1b">ce full swing. This is a great<span class="ls0 ws1c"> impact which affects the </span></span></div><div class="t m0 xf h2 y22 ff1 fs0 fc0 sc0 ls9 ws1d">performance of a larger<span class="_ _0"></span> de-composed multiple<span class="_ _0"></span>xer tree with TGL MUX. Finally the area </div><div class="t m0 xf h2 y23 ff1 fs0 fc0 sc0 ls0 ws0">comparison is also given to conclude that<span class="ls3 ws1e"> the proposed method <span class="lsa ws1f">is a better choice. </span></span></div><div class="t m0 xf h8 y24 ff1 fs3 fc0 sc0 ls3 ws2"> </div><div class="t m0 xf h8 y25 ff1 fs3 fc0 sc0 ls3 ws2"> </div><div class="t m0 xf h2 y26 ff2 fs0 fc0 sc0 ls6 ws2">Keywords:<span class="ff1 ls4 ws20"> <span class="_ _1"> </span>Mixed MUX, Transmission gate &#8211; Sta<span class="ls1 ws21">tic, Ultra Low Power, Hybrid, Area </span></span></div><div class="t m0 x10 h2 y27 ff1 fs0 fc0 sc0 lsd ws9">Optimization, Arithm<span class="_ _0"></span>etic Core </div><div class="t m0 x1 h2 y28 ff1 fs0 fc0 sc0 ls3 ws2"> </div><div class="t m0 x1 h9 y29 ff2 fs4 fc0 sc0 lse ws22">1. Introduction </div><div class="t m0 x1 h2 y2a ff1 fs0 fc0 sc0 ls6 ws23">Multiplexer (MUX) is fundamentally used as a switc<span class="ls9 ws24">h in arithmetic circu<span class="_ _0"></span>its. ALU is the dominant </span></div><div class="t m0 x1 h2 y2b ff1 fs0 fc0 sc0 lsf ws25">hardware element widely from handhelds to big co<span class="_ _0"></span><span class="ls6 ws26">mputing devices. A digital equipment as a big unit </span></div><div class="t m0 x1 h2 y2c ff1 fs0 fc0 sc0 lsc ws27">has its market which depends on power back-up. Wh<span class="lsa ws28">en the size influences, it causes the power to </span></div><div class="t m0 x1 h2 y2d ff1 fs0 fc0 sc0 ls2 ws29">proportionally vary. The increased power back-up time <span class="lsb ws2a">for the handheld devices is an im<span class="_ _0"></span>portant factor </span></div><div class="t m0 x1 h2 y2e ff1 fs0 fc0 sc0 ls4 ws2b">which always increases the expectations of the <span class="ws2c">consumers for lower power consumption. Apart from </span></div><div class="t m0 x1 h2 y2f ff1 fs0 fc0 sc0 ls10 ws8">that, the sub-threshold activ<span class="_ _0"></span>ities play a lead role in<span class="lsa ws1e"> a circuit design approach. <span class="_ _0"></span><span class="ls10 ws2d">The careful balance to run<span class="_ _0"></span> </span></span></div><div class="t m0 x1 h2 y30 ff1 fs0 fc0 sc0 ls9 ws2e">a system at low power but with reduced second order e<span class="ls8 ws2f">ffects [1] is the important <span class="ls4 ws3">criteria to be governed </span></span></div><div class="t m0 x1 h2 y31 ff1 fs0 fc0 sc0 ls9 ws30">in parallel. The control of power <span class="ls11 ws31">consumed by multiplexers<span class="_ _0"></span> is the key factor to meet the backup tim<span class="_ _0"></span>e </span></div><div class="t m0 x1 h2 y32 ff1 fs0 fc0 sc0 ls5 ws2">requirements. </div><div class="t m0 x11 h2 y33 ff1 fs0 fc0 sc0 ls5 ws32">Meanwhile, the data length is increasing which is<span class="lsa ws33"> of at least 64 bits nowadays. When the MUX </span></div><div class="t m0 x1 h2 y34 ff1 fs0 fc0 sc0 ls11 ws34">is used as a switch for such circuit then the entire<span class="_ _0"></span><span class="lsf ws35"> sub-cells will consume power<span class="_ _0"></span><span class="lsb ws36">. Perhaps all the cells in </span></span></div></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div> </body> </html>
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