• laitesen
    了解作者
  • Visual C++
    开发工具
  • 7.4MB
    文件大小
  • zip
    文件格式
  • 0
    收藏次数
  • 1 积分
    下载积分
  • 3
    下载次数
  • 2014-11-06 09:14
    上传日期
里面主要有PIC24H系列的技术文档PDF和SCH,PCB适合新手
PIC24H.zip
内容介绍
<html xmlns="http://www.w3.org/1999/xhtml"> <head> <meta charset="utf-8"> <meta name="generator" content="pdf2htmlEX"> <meta http-equiv="X-UA-Compatible" content="IE=edge,chrome=1"> <link rel="stylesheet" href="https://static.pudn.com/base/css/base.min.css"> <link rel="stylesheet" href="https://static.pudn.com/base/css/fancy.min.css"> <link rel="stylesheet" href="https://static.pudn.com/prod/directory_preview_static/62512b1674bc5c010595a7a0/raw.css"> <script src="https://static.pudn.com/base/js/compatibility.min.js"></script> <script src="https://static.pudn.com/base/js/pdf2htmlEX.min.js"></script> <script> try{ pdf2htmlEX.defaultViewer = new pdf2htmlEX.Viewer({}); }catch(e){} </script> <title></title> </head> <body> <div id="sidebar" style="display: none"> <div id="outline"> </div> </div> <div id="pf1" class="pf w0 h0" data-page-no="1"><div class="pc pc1 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/62512b1674bc5c010595a7a0/bg1.jpg"><div class="t m0 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0">&#61667;<span class="ff2 ls1 ws1"> 2009-2012 Microchip Technology Inc.<span class="_ _0"> </span><span class="ls2 ws2">DS70592D-page 1</span></span></div><div class="t m0 x2 h3 y2 ff3 fs1 fc0 sc0 ls3 ws0">PIC24HJXXXGPX06A/X08A/X10A</div><div class="t m0 x1 h4 y3 ff3 fs2 fc0 sc0 ls4 ws3">Operating Condi<span class="_ _1"></span>tions</div><div class="t m0 x1 h5 y4 ff2 fs3 fc0 sc0 ls5 ws4">&#8226;<span class="_ _2"> </span>3.0V to 3.<span class="_ _1"></span>6V<span class="_ _3"></span>, -40&#186;C to +<span class="_ _1"></span>150&#186;C, DC to 2<span class="_ _1"></span>0 MIPS</div><div class="t m0 x1 h5 y5 ff2 fs3 fc0 sc0 ls5 ws4">&#8226;<span class="_ _2"> </span>3.0V to 3.<span class="_ _1"></span>6V<span class="_ _3"></span>, -40&#186;C to +<span class="_ _1"></span>125&#186;C, DC to 4<span class="_ _1"></span>0 MIPS</div><div class="t m0 x1 h4 y6 ff3 fs2 fc0 sc0 ls4 ws3">Core: 16-bi<span class="_ _1"></span>t PIC24H CPU</div><div class="t m0 x1 h5 y7 ff2 fs3 fc0 sc0 ls6 ws5">&#8226;<span class="_ _2"> </span>Code-e<span class="_ _1"></span>ffi<span class="_ _1"></span>cient (C<span class="_ _1"></span> and Asse<span class="_ _1"></span>mbly)<span class="_ _1"></span> archit<span class="_ _1"></span>ecture</div><div class="t m0 x1 h5 y8 ff2 fs3 fc0 sc0 ls7 ws6">&#8226;<span class="_ _2"> </span>Singl<span class="_ _1"></span>e-cycle<span class="_ _1"></span> mixe<span class="_ _1"></span>d-sign MUL<span class="_ _1"></span> plus<span class="_ _1"></span> hardware<span class="_ _1"></span> divid<span class="_ _1"></span>e</div><div class="t m0 x1 h4 y9 ff3 fs2 fc0 sc0 ls8 ws7">Clock Management</div><div class="t m0 x1 h5 ya ff2 fs3 fc0 sc0 ls9 ws8">&#8226;<span class="_ _2"> </span>&#177;2% in<span class="_ _1"></span>ternal <span class="_ _1"></span>oscilla<span class="_ _1"></span>tor</div><div class="t m0 x1 h5 yb ff2 fs3 fc0 sc0 lsa ws9">&#8226;<span class="_ _2"> </span>Program<span class="_ _1"></span>mable PL<span class="_ _1"></span>Ls and<span class="_ _1"></span> oscill<span class="_ _1"></span>ator cl<span class="_ _1"></span>ock sou<span class="_ _1"></span>rces</div><div class="t m0 x1 h5 yc ff2 fs3 fc0 sc0 lsb wsa">&#8226;<span class="_ _2"> </span>Fail-Safe<span class="_ _1"></span> Clock <span class="_ _1"></span>Monit<span class="_ _1"></span>or (FSCM)</div><div class="t m0 x1 h5 yd ff2 fs3 fc0 sc0 lsc wsb">&#8226;<span class="_ _2"> </span>Indepen<span class="_ _1"></span>dent W<span class="_ _4"></span>atchdog<span class="_ _4"></span> Timer (W<span class="_ _4"></span>DT)</div><div class="t m0 x1 h5 ye ff2 fs3 fc0 sc0 lsb wsa">&#8226;<span class="_ _2"> </span>Fast w<span class="_ _1"></span>ake-up an<span class="_ _1"></span>d start-<span class="_ _4"></span>up</div><div class="t m0 x1 h4 yf ff3 fs2 fc0 sc0 lsd wsc">Power Management</div><div class="t m0 x1 h5 y10 ff2 fs3 fc0 sc0 ls6 ws5">&#8226;<span class="_ _2"> </span>Low-po<span class="_ _4"></span>wer management m<span class="_ _4"></span>odes (Sleep, Idle<span class="_ _4"></span>, </div><div class="t m0 x3 h5 y11 ff2 fs3 fc0 sc0 lse ws0">Doze)</div><div class="t m0 x1 h5 y12 ff2 fs3 fc0 sc0 lsf wsd">&#8226;<span class="_ _2"> </span>Integrate<span class="_ _4"></span>d Power-on Reset a<span class="_ _1"></span>nd Brown-o<span class="_ _1"></span>ut Reset</div><div class="t m0 x1 h5 y13 ff2 fs3 fc0 sc0 ls10 wse">&#8226;<span class="_ _2"> </span>1.35 mA/M<span class="_ _4"></span>Hz dynamic c<span class="_ _1"></span>urrent (typi<span class="_ _1"></span>cal)</div><div class="t m0 x1 h6 y14 ff2 fs3 fc0 sc0 ls11 ws0">&#8226;5<span class="_ _5"></span>5<span class="_ _5"></span> <span class="_ _5"></span><span class="ff4 ls0">&#956;<span class="ff2 ls12 wsf">A I<span class="fs4 ls13 ws0">PD</span><span class="ls14 ws10"> current (typical)</span></span></span></div><div class="t m0 x1 h4 y15 ff3 fs2 fc0 sc0 ls15 ws11">Advanced Analog F<span class="_ _4"></span>eatures</div><div class="t m0 x1 h5 y16 ff2 fs3 fc0 sc0 ls16 ws12">&#8226;<span class="_ _2"> </span>T<span class="_ _4"></span>wo ADC modules:</div><div class="t m0 x3 h5 y17 ff2 fs3 fc0 sc0 ls10 wse">-<span class="_ _2"> </span>Configurable<span class="_ _4"></span> as 10-bit, 1.1 M<span class="_ _4"></span>s<span class="_ _6"></span>ps wi<span class="_ _4"></span>th four </div><div class="t m0 x4 h5 y18 ff2 fs3 fc0 sc0 ls17 ws13">S&amp;H or 12<span class="_ _1"></span>-bit, 500 k<span class="_ _4"></span>s<span class="_ _6"></span>ps <span class="_ _4"></span>w<span class="_ _6"></span>ith one<span class="_ _1"></span> S&amp;H</div><div class="t m0 x3 h5 y19 ff2 fs3 fc0 sc0 ls9 ws14">-<span class="_ _2"> </span>18 analog <span class="_ _4"></span>inputs on 6<span class="_ _4"></span>4-pin devices<span class="_ _1"></span> and u<span class="_ _1"></span>p to </div><div class="t m0 x4 h5 y1a ff2 fs3 fc0 sc0 ls7 ws6">32 anal<span class="_ _4"></span>og inputs<span class="_ _1"></span> on 100-pi<span class="_ _4"></span>n devices</div><div class="t m0 x1 h5 y1b ff2 fs3 fc0 sc0 ls9 ws14">&#8226;<span class="_ _2"> </span>Flexibl<span class="_ _4"></span>e <span class="_ _6"></span>and indepe<span class="_ _1"></span>ndent ADC trigger sou<span class="_ _4"></span>rces</div><div class="t m0 x1 h4 y1c ff3 fs2 fc0 sc0 ls18 ws15">Timer<span class="_ _4"></span>s/Output Compare/I<span class="_ _4"></span>nput Capture</div><div class="t m0 x1 h5 y1d ff2 fs3 fc0 sc0 ls17 ws13">&#8226;<span class="_ _2"> </span>Up to n<span class="_ _1"></span>ine 16-bi<span class="_ _4"></span>t timers/counters. Ca<span class="_ _1"></span>n pair u<span class="_ _4"></span>p to </div><div class="t m0 x3 h5 y1e ff2 fs3 fc0 sc0 lsc wsb">make fo<span class="_ _1"></span>ur 32-bit ti<span class="_ _4"></span>mers.</div><div class="t m0 x1 h5 y1f ff2 fs3 fc0 sc0 ls19 ws16">&#8226;<span class="_ _2"> </span>Eight<span class="_ _4"></span> Output Comp<span class="_ _4"></span>are module<span class="_ _1"></span>s config<span class="_ _4"></span>urable as </div><div class="t m0 x3 h5 y20 ff2 fs3 fc0 sc0 ls7 ws0">timers/<span class="_ _4"></span>counters</div><div class="t m0 x1 h5 y21 ff2 fs3 fc0 sc0 ls6 ws5">&#8226;<span class="_ _2"> </span>Eight<span class="_ _1"></span> Input Ca<span class="_ _4"></span>pture modules</div><div class="t m0 x5 h4 y3 ff3 fs2 fc0 sc0 ls1a ws17">Communication Interf<span class="_ _1"></span>aces</div><div class="t m0 x5 h5 y22 ff2 fs3 fc0 sc0 ls1b ws18">&#8226;<span class="_ _2"> </span>T<span class="_ _4"></span>wo UAR<span class="_ _4"></span>T modules<span class="_ _4"></span> (10 Mbps<span class="_ _1"></span>)</div><div class="t m0 x6 h5 y23 ff2 fs3 fc0 sc0 lsb wsa">-<span class="_ _2"> </span>With suppor<span class="_ _4"></span>t for LIN 2.0 proto<span class="_ _4"></span>cols and IrDA</div><div class="t m0 x7 h7 y24 ff2 fs4 fc0 sc0 ls0 ws0">&#174;</div><div class="t m0 x5 h5 y25 ff2 fs3 fc0 sc0 ls10 wse">&#8226;<span class="_ _2"> </span>T<span class="_ _4"></span>wo 4-wi<span class="_ _1"></span>re SPI modul<span class="_ _4"></span>es (15 Mbps<span class="_ _1"></span>)</div><div class="t m0 x5 h5 y26 ff2 fs3 fc0 sc0 ls1c ws19">&#8226;<span class="_ _2"> </span>Up to two<span class="_ _1"></span> I</div><div class="t m0 x8 h7 y6 ff2 fs4 fc0 sc0 ls0 ws0">2</div><div class="t m0 x9 h5 y26 ff2 fs3 fc0 sc0 ls10 wse">C&#8482; modu<span class="_ _1"></span>les (up to<span class="_ _4"></span> 1 Mbaud) with </div><div class="t m0 x6 h5 y27 ff2 fs3 fc0 sc0 ls1d ws1a">SMBus supp<span class="_ _4"></span>ort</div><div class="t m0 x5 h5 y28 ff2 fs3 fc0 sc0 ls1e ws1b">&#8226;<span class="_ _2"> </span>Up to two<span class="_ _4"></span> Enhanced CAN (EC<span class="_ _4"></span>AN) modules </div><div class="t m0 x6 h5 y29 ff2 fs3 fc0 sc0 lsc wsb">(1<span class="_"> </span>Mbaud<span class="_ _4"></span>) with 2.0B supp<span class="_ _1"></span>ort</div><div class="t m0 x5 h5 y2a ff2 fs3 fc0 sc0 lsb wsa">&#8226;<span class="_ _2"> </span>Dat<span class="_ _4"></span>a Converter Inte<span class="_ _1"></span>rface (DCI) <span class="_ _1"></span>module w<span class="_ _1"></span>ith I</div><div class="t m0 xa h7 y2b ff2 fs4 fc0 sc0 ls0 ws0">2</div><div class="t m0 xb h5 y2c ff2 fs3 fc0 sc0 ls12 ws0">S </div><div class="t m0 x6 h5 y2d ff2 fs3 fc0 sc0 ls1f ws1c">codec s<span class="_ _4"></span>upport</div><div class="t m0 x5 h4 y2e ff3 fs2 fc0 sc0 ls20 ws0">Input/Output</div><div class="t m0 x5 h5 y2f ff2 fs3 fc0 sc0 ls21 ws1d">&#8226;<span class="_ _2"> </span>Sink/<span class="_ _1"></span>Source up t<span class="_ _4"></span>o 10 mA (pin spec<span class="_ _4"></span>ific) for st<span class="_ _1"></span>an-</div><div class="t m0 x6 h5 y30 ff2 fs3 fc0 sc0 lsc wsb">dard V</div><div class="t m0 xc h5 y31 ff2 fs4 fc0 sc0 ls22 ws0">OH<span class="fs3 ls23">/V<span class="_ _4"></span><span class="fs4 ls24">OL<span class="fs3 ls25 ws1e">, up to 16<span class="_ _4"></span> mA (pin specif<span class="_ _1"></span>ic) for non<span class="_ _4"></span>-</span></span></span></div><div class="t m0 x6 h5 y32 ff2 fs3 fc0 sc0 ls26 ws1f">stan<span class="_ _4"></span>dard V</div><div class="t m0 x8 h7 y33 ff2 fs4 fc0 sc0 ls24 ws0">OH<span class="fs5 ls0">1</span></div><div class="t m0 x5 h5 y34 ff2 fs3 fc0 sc0 ls26 ws1f">&#8226;<span class="_ _2"> </span>5V<span class="_ _4"></span>-toleran<span class="_ _4"></span>t pins</div><div class="t m0 x5 h5 y35 ff2 fs3 fc0 sc0 ls9 ws8">&#8226;<span class="_ _2"> </span>Selec<span class="_ _1"></span>table <span class="_ _4"></span>open drain, pu<span class="_ _4"></span>ll-ups, and <span class="_ _4"></span>pull-downs</div><div class="t m0 x5 h5 y36 ff2 fs3 fc0 sc0 ls6 ws8">&#8226;<span class="_ _2"> </span>Up to 5<span class="_ _4"></span> mA overvolt<span class="_ _4"></span>age clamp curre<span class="_ _1"></span>nt</div><div class="t m0 x5 h5 y37 ff2 fs3 fc0 sc0 ls6 ws20">&#8226;<span class="_ _2"> </span>Extern<span class="_ _1"></span>al interrupt<span class="_ _4"></span>s on all I/O <span class="_ _6"></span>pins</div><div class="t m0 x5 h4 y38 ff3 fs2 fc0 sc0 ls27 ws21">Qualificat<span class="_ _1"></span>ion and Clas<span class="_ _4"></span>s B Support</div><div class="t m0 x5 h5 y39 ff2 fs3 fc0 sc0 ls14 ws10">&#8226;<span class="_ _2"> </span>AEC-Q100 REVG<span class="_ _1"></span> (Grade 1<span class="_ _1"></span> -40&#186;C to +1<span class="_ _4"></span>25&#186;C)</div><div class="t m0 x5 h5 y3a ff2 fs3 fc0 sc0 ls14 ws10">&#8226;<span class="_ _2"> </span>AEC-Q100 REVG<span class="_ _1"></span> (Grade 0<span class="_ _1"></span> -40&#186;C to +1<span class="_ _4"></span>50&#186;C)</div><div class="t m0 x5 h5 y3b ff2 fs3 fc0 sc0 ls28 ws22">&#8226;<span class="_ _2"> </span>Class B Sa<span class="_ _4"></span>fety Library<span class="_ _3"></span>, IEC 60730</div><div class="t m0 x5 h4 y3c ff3 fs2 fc0 sc0 ls29 ws23">Debugger Development<span class="_ _4"></span> Support</div><div class="t m0 x5 h5 y3d ff2 fs3 fc0 sc0 ls6 ws20">&#8226;<span class="_ _2"> </span>In-ci<span class="_ _1"></span>rcuit and in-appl<span class="_ _4"></span>ication programmi<span class="_ _1"></span>ng</div><div class="t m0 x5 h5 y3e ff2 fs3 fc0 sc0 ls6 ws5">&#8226;<span class="_ _2"> </span>T<span class="_ _4"></span>wo program<span class="_ _4"></span> and two comple<span class="_ _4"></span>x data bre<span class="_ _1"></span>akpoint<span class="_ _4"></span>s</div><div class="t m0 x5 h5 y3f ff2 fs3 fc0 sc0 ls2a ws24">&#8226;<span class="_ _2"> </span>IEEE 1<span class="_ _3"></span>149.2-compat<span class="_ _4"></span>i<span class="_ _6"></span>ble (JT<span class="_ _3"></span>AG) boundary scan</div><div class="t m0 x5 h5 y40 ff2 fs3 fc0 sc0 ls2a ws25">&#8226;<span class="_ _2"> </span>T<span class="_ _4"></span>race and run<span class="_ _1"></span>-time watch</div><div class="t m0 x1 h4 y41 ff3 fs2 fc0 sc0 ls2b ws0">Packages</div><div class="t m0 xd h8 y42 ff3 fs5 fc0 sc0 ls2c ws0">T<span class="_ _4"></span>ype<span class="_ _7"> </span>QFN<span class="_ _8"> </span>TQFP<span class="_ _9"> </span>TQFP<span class="_ _8"> </span>TQFP</div><div class="t m0 xe h8 y43 ff3 fs5 fc0 sc0 ls2d ws26">Pin Count<span class="_ _a"> </span><span class="ff2 ls2e ws0">64<span class="_ _b"> </span>64<span class="_ _c"> </span>100<span class="_ _d"> </span>100</span></div><div class="t m0 x4 h8 y44 ff3 fs5 fc0 sc0 ls2f ws27">Contact Lead/Pit<span class="_ _6"></span>ch<span class="_ _e"> </span><span class="ff2 ls30 ws0">0.50<span class="_ _f"> </span>0.50<span class="_ _10"> </span>0.50<span class="_ _11"> </span>0.40</span></div><div class="t m0 xf h8 y45 ff3 fs5 fc0 sc0 ls2c ws0">I/O Pin<span class="_ _6"></span>s<span class="_ _12"> </span><span class="ff2 ls2e">53<span class="_ _b"> </span>53<span class="_ _d"> </span>85<span class="_ _13"> </span>85</span></div><div class="t m0 x10 h8 y46 ff3 fs5 fc0 sc0 ls31 ws0">Dimensions<span class="_ _14"> </span><span class="ff2 ls32">9x9x0.9<span class="_ _15"> </span>10x10x1<span class="_ _16"> </span>12x12x1<span class="_ _17"> </span>14x14x1</span></div><div class="t m0 x11 h8 y47 ff3 fs5 fc0 sc0 ls33 ws0">Note:<span class="_ _18"> </span><span class="ff2 ls34 ws28">All dimensions are in millimeters (mm) <span class="_ _6"></span>unless specified.</span></div><div class="t m0 x12 h9 y48 ff5 fs6 fc0 sc0 ls35 ws29">16-bit Micr<span class="_ _4"></span>ocontrollers <span class="ws2a">(up to 256 KB Flash and </span></div><div class="t m0 x13 h9 y49 ff5 fs6 fc0 sc0 ls35 ws29">16<span class="_"> </span>KB<span class="_"> </span>SRAM) <span class="_ _1"></span>with Advanced Analog</div></div><div class="pi" data-data='{"ctm":[1.568627,0.000000,0.000000,1.568627,0.000000,0.000000]}'></div></div> </body> </html>
评论
    相关推荐
    • Proteus7.12.rar
      Proteus7.12完美破解版.rar电路仿真软件很好用可以仿真单片数字模拟电路
    • VHDL 的实例程序,共44个.rar
      经典VHDL 的实例程序,共44个!要下载的尽快
    • USBtoRS232Driver.rar
      USB转串口驱动程序,可以用在笔记本电脑上,方便的通过串口给单片机下载程序!
    • 模糊控制程序.rar
      模糊PID控制程序的源码,是作业,有讲解,
    • 串口编程源代码.rar
      这是本人最近几年所编写的串行通讯的代码集,可以供大家参考学习。
    • DELTA_PLC.rar
      台达PLC Modbus协议通信dll com控件
    • hongwaigooog.rar
      单片机红外遥控最全的资料,包含很多当前电视遥控专用芯片的解码方式,C语言和汇编语言编写的解码范例程序,看完了你就会了!
    • MF500绝密.rar
      非接触式IC卡开发板源程序,包括原理图/PCB图;源程序在KEIL环境下编译,打开压缩包后直接点击PRJ文件,即可编译使用。 这是个保密文件,做Mifare one卡开发人基本上都用过到这个源代码。
    • 20078251299410.rar
      C51实用程序(45个) I/O、定时器、中断、看门狗、计数器、软件AD、VB串口、93c06驱动、24c02系列驱动、7219、20045、软件陷阱、串口中断、码值转换、AVR通讯、IIC、DS1302、DS1820、SPI、1602、12232、12864、T6963、1330、PC键、键盘输入法、智能化、飞机游戏、贪吃蛇、多级菜单实例等
    • mcudesign.rar
      单片机设计,毕业设计 16×16点阵(滚动显示)论文+程序 cdma通信系统中的接入信道部分进行仿真与分析 LED显示屏动态显示和远程监控的实现 MCS-51单片机温度控制系统 USB接口设计 毕业设计(论文)OFDM通信系统基带数据 仓库温湿度的监测系统 单片机串行通信发射机 单片机课程设计__电子密码锁报告 单片机控制交通灯 电动智能小车(完整论文 电气工程系06届毕业设计开题报告 电信运营商收入保障系统设计与实现 电子设计大赛点阵电子显示屏(A题 电子时钟 火灾自动报警系统设计 基于GSM短信模块的家庭防盗报警系统 基于GSM模块的车载防盗系统设计 TC35i 资料 基于网络的虚拟仪器测试系统 门控自动照明电路 全遥控数字音量控制的D类功率放大器 数控直流稳压电源完整论文 数字密码锁设计 数字抢答器(数字电路) 数字时钟 水箱单片机控制系统 同步电机模型的MATLAB仿真 温度监控系统的设计 用单片机控制直流电机 用单片机实现温度远程显示 智能家用电热水器控制器 智能型充电器电源和显示的设计 自动加料机控制系统