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  • 2014-12-16 15:47
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OHCI HCD (Host Controller Driver) for USB.
ohci-omap.rar
  • ohci-omap.c
    12.5KB
内容介绍
/* * OHCI HCD (Host Controller Driver) for USB. * * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> * (C) Copyright 2000-2005 David Brownell * (C) Copyright 2002 Hewlett-Packard Company * * OMAP Bus Glue * * Modified for OMAP by Tony Lindgren <tony@atomide.com> * Based on the 2.4 OMAP OHCI driver originally done by MontaVista Software Inc. * and on ohci-sa1111.c by Christopher Hoover <ch@hpl.hp.com> * * This file is licenced under the GPL. */ #include <linux/clk.h> #include <linux/dma-mapping.h> #include <linux/err.h> #include <linux/gpio.h> #include <linux/io.h> #include <linux/jiffies.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/usb/otg.h> #include <linux/platform_device.h> #include <linux/signal.h> #include <linux/usb.h> #include <linux/usb/hcd.h> #include "ohci.h" #include <asm/io.h rel='nofollow' onclick='return false;'> #include <asm/mach-types.h rel='nofollow' onclick='return false;'> #include <mach/mux.h> #include <mach/hardware.h> #include <mach/irqs.h> #include <mach/usb.h> /* OMAP-1510 OHCI has its own MMU for DMA */ #define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */ #define OMAP1510_LB_CLOCK_DIV 0xfffec10c #define OMAP1510_LB_MMU_CTL 0xfffec208 #define OMAP1510_LB_MMU_LCK 0xfffec224 #define OMAP1510_LB_MMU_LD_TLB 0xfffec228 #define OMAP1510_LB_MMU_CAM_H 0xfffec22c #define OMAP1510_LB_MMU_CAM_L 0xfffec230 #define OMAP1510_LB_MMU_RAM_H 0xfffec234 #define OMAP1510_LB_MMU_RAM_L 0xfffec238 #define DRIVER_DESC "OHCI OMAP driver" #ifdef CONFIG_TPS65010 #include <linux/i2c/tps65010.h> #else #define LOW 0 #define HIGH 1 #define GPIO1 1 static inline int tps65010_set_gpio_out_value(unsigned gpio, unsigned value) { return 0; } #endif extern int usb_disabled(void); extern int ocpi_enable(void); static struct clk *usb_host_ck; static struct clk *usb_dc_ck; static const char hcd_name[] = "ohci-omap"; static struct hc_driver __read_mostly ohci_omap_hc_driver; static void omap_ohci_clock_power(int on) { if (on) { clk_enable(usb_dc_ck); clk_enable(usb_host_ck); /* guesstimate for T5 == 1x 32K clock + APLL lock time */ udelay(100); } else { clk_disable(usb_host_ck); clk_disable(usb_dc_ck); } } /* * Board specific gang-switched transceiver power on/off. * NOTE: OSK supplies power from DC, not battery. */ static int omap_ohci_transceiver_power(int on) { if (on) { if (machine_is_omap_innovator() && cpu_is_omap1510()) __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), INNOVATOR_FPGA_CAM_USB_CONTROL); else if (machine_is_omap_osk()) tps65010_set_gpio_out_value(GPIO1, LOW); } else { if (machine_is_omap_innovator() && cpu_is_omap1510()) __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), INNOVATOR_FPGA_CAM_USB_CONTROL); else if (machine_is_omap_osk()) tps65010_set_gpio_out_value(GPIO1, HIGH); } return 0; } #ifdef CONFIG_ARCH_OMAP15XX /* * OMAP-1510 specific Local Bus clock on/off */ static int omap_1510_local_bus_power(int on) { if (on) { omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL); udelay(200); } else { omap_writel(0, OMAP1510_LB_MMU_CTL); } return 0; } /* * OMAP-1510 specific Local Bus initialization * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE. * See also arch/mach-omap/memory.h for __virt_to_dma() and * __dma_to_virt() which need to match with the physical * Local Bus address below. */ static int omap_1510_local_bus_init(void) { unsigned int tlb; unsigned long lbaddr, physaddr; omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4, OMAP1510_LB_CLOCK_DIV); /* Configure the Local Bus MMU table */ for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) { lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET; physaddr = tlb * 0x00100000 + PHYS_OFFSET; omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H); omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc, OMAP1510_LB_MMU_CAM_L); omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H); omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L); omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK); omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB); } /* Enable the walking table */ omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL); udelay(200); return 0; } #else #define omap_1510_local_bus_power(x) {} #define omap_1510_local_bus_init() {} #endif #ifdef CONFIG_USB_OTG static void start_hnp(struct ohci_hcd *ohci) { struct usb_hcd *hcd = ohci_to_hcd(ohci); const unsigned port = hcd->self.otg_port - 1; unsigned long flags; u32 l; otg_start_hnp(hcd->phy->otg); local_irq_save(flags); hcd->phy->state = OTG_STATE_A_SUSPEND; writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]); l = omap_readl(OTG_CTRL); l &= ~OTG_A_BUSREQ; omap_writel(l, OTG_CTRL); local_irq_restore(flags); } #endif /*-------------------------------------------------------------------------*/ static int ohci_omap_reset(struct usb_hcd *hcd) { struct ohci_hcd *ohci = hcd_to_ohci(hcd); struct omap_usb_config *config = dev_get_platdata(hcd->self.controller); int need_transceiver = (config->otg != 0); int ret; dev_dbg(hcd->self.controller, "starting USB Controller\n"); if (config->otg) { hcd->self.otg_port = config->otg; /* default/minimum OTG power budget: 8 mA */ hcd->power_budget = 8; } /* boards can use OTG transceivers in non-OTG modes */ need_transceiver = need_transceiver || machine_is_omap_h2() || machine_is_omap_h3(); /* XXX OMAP16xx only */ if (config->ocpi_enable) config->ocpi_enable(); #ifdef CONFIG_USB_OTG if (need_transceiver) { hcd->phy = usb_get_phy(USB_PHY_TYPE_USB2); if (!IS_ERR_OR_NULL(hcd->phy)) { int status = otg_set_host(hcd->phy->otg, &ohci_to_hcd(ohci)->self); dev_dbg(hcd->self.controller, "init %s phy, status %d\n", hcd->phy->label, status); if (status) { usb_put_phy(hcd->phy); return status; } } else { dev_err(hcd->self.controller, "can't find phy\n"); return -ENODEV; } ohci->start_hnp = start_hnp; } #endif omap_ohci_clock_power(1); if (cpu_is_omap15xx()) { omap_1510_local_bus_power(1); omap_1510_local_bus_init(); } ret = ohci_setup(hcd); if (ret < 0) return ret; if (config->otg || config->rwc) { ohci->hc_control = OHCI_CTRL_RWC; writel(OHCI_CTRL_RWC, &ohci->regs->control); } /* board-specific power switching and overcurrent support */ if (machine_is_omap_osk() || machine_is_omap_innovator()) { u32 rh = roothub_a (ohci); /* power switching (ganged by default) */ rh &= ~RH_A_NPS; /* TPS2045 switch for internal transceiver (port 1) */ if (machine_is_omap_osk()) { ohci_to_hcd(ohci)->power_budget = 250; rh &= ~RH_A_NOCP; /* gpio9 for overcurrent detction */ omap_cfg_reg(W8_1610_GPIO9); gpio_request(9, "OHCI overcurrent"); gpio_direction_input(9); /* for paranoia's sake: disable USB.PUEN */ omap_cfg_reg(W4_USB_HIGHZ); } ohci_writel(ohci, rh, &ohci->regs->roothub.a); ohci->flags &= ~OHCI_QUIRK_HUB_POWER; } else if (machine_is_nokia770()) { /* We require a self-powered hub, which should have * plenty of power. */ ohci_to_hcd(ohci)->power_budget = 0; } /* FIXME khubd hub requests should manage power switching */ omap_ohci_transceiver_power(1); /* board init will have already handled HMC and mux setup. * any external transceiver should already be initialized * too, so all configured ports use the right signaling now. */ return 0; } /*-------------------------------------------------------------------------*/ /** * usb_hcd_omap_probe - initialize OMAP-based HCDs * Context: !in_interrupt() * * Allocates basic resources for this USB host controller, and * then invokes the start() method for the HCD associated with it * through the hotplug entry's driver_data. */ static int usb_hcd_omap_probe (const struct hc_driver *driver, struct platform_device
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