hd64572.rar

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  • 2015-01-15 14:37
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Description of the Hitachi HD64572 (SCA-II), valid for CPU modes 0 & 2.
hd64572.rar
  • hd64572.c
    17.5KB
  • hd64572.h
    15.7KB
内容介绍
/* * Hitachi (now Renesas) SCA-II HD64572 driver for Linux * * Copyright (C) 1998-2008 Krzysztof Halasa <khc@pm.waw.pl> * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License * as published by the Free Software Foundation. * * Source of information: HD64572 SCA-II User's Manual * * We use the following SCA memory map: * * Packet buffer descriptor rings - starting from card->rambase: * rx_ring_buffers * sizeof(pkt_desc) = logical channel #0 RX ring * tx_ring_buffers * sizeof(pkt_desc) = logical channel #0 TX ring * rx_ring_buffers * sizeof(pkt_desc) = logical channel #1 RX ring (if used) * tx_ring_buffers * sizeof(pkt_desc) = logical channel #1 TX ring (if used) * * Packet data buffers - starting from card->rambase + buff_offset: * rx_ring_buffers * HDLC_MAX_MRU = logical channel #0 RX buffers * tx_ring_buffers * HDLC_MAX_MRU = logical channel #0 TX buffers * rx_ring_buffers * HDLC_MAX_MRU = logical channel #0 RX buffers (if used) * tx_ring_buffers * HDLC_MAX_MRU = logical channel #0 TX buffers (if used) */ #include <linux/bitops.h> #include <linux/errno.h> #include <linux/fcntl.h> #include <linux/hdlc.h> #include <linux/in.h> #include <linux/interrupt.h> #include <linux/ioport.h> #include <linux/jiffies.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/netdevice.h> #include <linux/skbuff.h> #include <linux/string.h> #include <linux/types.h> #include <asm/io.h rel='nofollow' onclick='return false;'> #include <asm/uaccess.h rel='nofollow' onclick='return false;'> #include "hd64572.h" #define NAPI_WEIGHT 16 #define get_msci(port) (port->chan ? MSCI1_OFFSET : MSCI0_OFFSET) #define get_dmac_rx(port) (port->chan ? DMAC1RX_OFFSET : DMAC0RX_OFFSET) #define get_dmac_tx(port) (port->chan ? DMAC1TX_OFFSET : DMAC0TX_OFFSET) #define sca_in(reg, card) readb(card->scabase + (reg)) #define sca_out(value, reg, card) writeb(value, card->scabase + (reg)) #define sca_inw(reg, card) readw(card->scabase + (reg)) #define sca_outw(value, reg, card) writew(value, card->scabase + (reg)) #define sca_inl(reg, card) readl(card->scabase + (reg)) #define sca_outl(value, reg, card) writel(value, card->scabase + (reg)) static int sca_poll(struct napi_struct *napi, int budget); static inline port_t* dev_to_port(struct net_device *dev) { return dev_to_hdlc(dev)->priv; } static inline void enable_intr(port_t *port) { /* enable DMIB and MSCI RXINTA interrupts */ sca_outl(sca_inl(IER0, port->card) | (port->chan ? 0x08002200 : 0x00080022), IER0, port->card); } static inline void disable_intr(port_t *port) { sca_outl(sca_inl(IER0, port->card) & (port->chan ? 0x00FF00FF : 0xFF00FF00), IER0, port->card); } static inline u16 desc_abs_number(port_t *port, u16 desc, int transmit) { u16 rx_buffs = port->card->rx_ring_buffers; u16 tx_buffs = port->card->tx_ring_buffers; desc %= (transmit ? tx_buffs : rx_buffs); // called with "X + 1" etc. return port->chan * (rx_buffs + tx_buffs) + transmit * rx_buffs + desc; } static inline u16 desc_offset(port_t *port, u16 desc, int transmit) { /* Descriptor offset always fits in 16 bits */ return desc_abs_number(port, desc, transmit) * sizeof(pkt_desc); } static inline pkt_desc __iomem *desc_address(port_t *port, u16 desc, int transmit) { return (pkt_desc __iomem *)(port->card->rambase + desc_offset(port, desc, transmit)); } static inline u32 buffer_offset(port_t *port, u16 desc, int transmit) { return port->card->buff_offset + desc_abs_number(port, desc, transmit) * (u32)HDLC_MAX_MRU; } static inline void sca_set_carrier(port_t *port) { if (!(sca_in(get_msci(port) + ST3, port->card) & ST3_DCD)) { #ifdef DEBUG_LINK printk(KERN_DEBUG "%s: sca_set_carrier on\n", port->netdev.name); #endif netif_carrier_on(port->netdev); } else { #ifdef DEBUG_LINK printk(KERN_DEBUG "%s: sca_set_carrier off\n", port->netdev.name); #endif netif_carrier_off(port->netdev); } } static void sca_init_port(port_t *port) { card_t *card = port->card; u16 dmac_rx = get_dmac_rx(port), dmac_tx = get_dmac_tx(port); int transmit, i; port->rxin = 0; port->txin = 0; port->txlast = 0; for (transmit = 0; transmit < 2; transmit++) { u16 buffs = transmit ? card->tx_ring_buffers : card->rx_ring_buffers; for (i = 0; i < buffs; i++) { pkt_desc __iomem *desc = desc_address(port, i, transmit); u16 chain_off = desc_offset(port, i + 1, transmit); u32 buff_off = buffer_offset(port, i, transmit); writel(chain_off, &desc->cp); writel(buff_off, &desc->bp); writew(0, &desc->len); writeb(0, &desc->stat); } } /* DMA disable - to halt state */ sca_out(0, DSR_RX(port->chan), card); sca_out(0, DSR_TX(port->chan), card); /* software ABORT - to initial state */ sca_out(DCR_ABORT, DCR_RX(port->chan), card); sca_out(DCR_ABORT, DCR_TX(port->chan), card); /* current desc addr */ sca_outl(desc_offset(port, 0, 0), dmac_rx + CDAL, card); sca_outl(desc_offset(port, card->tx_ring_buffers - 1, 0), dmac_rx + EDAL, card); sca_outl(desc_offset(port, 0, 1), dmac_tx + CDAL, card); sca_outl(desc_offset(port, 0, 1), dmac_tx + EDAL, card); /* clear frame end interrupt counter */ sca_out(DCR_CLEAR_EOF, DCR_RX(port->chan), card); sca_out(DCR_CLEAR_EOF, DCR_TX(port->chan), card); /* Receive */ sca_outw(HDLC_MAX_MRU, dmac_rx + BFLL, card); /* set buffer length */ sca_out(0x14, DMR_RX(port->chan), card); /* Chain mode, Multi-frame */ sca_out(DIR_EOME, DIR_RX(port->chan), card); /* enable interrupts */ sca_out(DSR_DE, DSR_RX(port->chan), card); /* DMA enable */ /* Transmit */ sca_out(0x14, DMR_TX(port->chan), card); /* Chain mode, Multi-frame */ sca_out(DIR_EOME, DIR_TX(port->chan), card); /* enable interrupts */ sca_set_carrier(port); netif_napi_add(port->netdev, &port->napi, sca_poll, NAPI_WEIGHT); } /* MSCI interrupt service */ static inline void sca_msci_intr(port_t *port) { u16 msci = get_msci(port); card_t* card = port->card; if (sca_in(msci + ST1, card) & ST1_CDCD) { /* Reset MSCI CDCD status bit */ sca_out(ST1_CDCD, msci + ST1, card); sca_set_carrier(port); } } static inline void sca_rx(card_t *card, port_t *port, pkt_desc __iomem *desc, u16 rxin) { struct net_device *dev = port->netdev; struct sk_buff *skb; u16 len; u32 buff; len = readw(&desc->len); skb = dev_alloc_skb(len); if (!skb) { dev->stats.rx_dropped++; return; } buff = buffer_offset(port, rxin, 0); memcpy_fromio(skb->data, card->rambase + buff, len); skb_put(skb, len); #ifdef DEBUG_PKT printk(KERN_DEBUG "%s RX(%i):", dev->name, skb->len); debug_frame(skb); #endif dev->stats.rx_packets++; dev->stats.rx_bytes += skb->len; skb->protocol = hdlc_type_trans(skb, dev); netif_receive_skb(skb); } /* Receive DMA service */ static inline int sca_rx_done(port_t *port, int budget) { struct net_device *dev = port->netdev; u16 dmac = get_dmac_rx(port); card_t *card = port->card; u8 stat = sca_in(DSR_RX(port->chan), card); /* read DMA Status */ int received = 0; /* Reset DSR status bits */ sca_out((stat & (DSR_EOT | DSR_EOM | DSR_BOF | DSR_COF)) | DSR_DWE, DSR_RX(port->chan), card); if (stat & DSR_BOF) /* Dropped one or more frames */ dev->stats.rx_over_errors++; while (received < budget) { u32 desc_off = desc_offset(port, port->rxin, 0); pkt_desc __iomem *desc; u32 cda = sca_inl(dmac + CDAL, card); if ((cda >= desc_off) && (cda < desc_off + sizeof(pkt_desc))) break; /* No frame received */ desc = desc_address(port, port->rxin, 0); stat = readb(&desc->stat); if (!(stat & ST_RX_EOM)) port->rxpart = 1; /* partial frame received */ else if ((stat & ST_ERROR_MASK) || port->rxpart) { dev->stats.rx_errors++; if (stat & ST_RX_OVERRUN) dev->stats.rx_fifo_errors++; else if ((stat & (ST_RX_SHORT | ST_RX_ABORT | ST_RX_RESBIT)) || port->rxpart) dev->stats.rx_frame_errors++; else if (stat & ST_RX_CRC) dev->stats.rx_crc_errors++;
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