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  • 2015-03-22 01:03
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High-performance, Low-power Atmel AVR 8-bit Microcontroller &#1048698 Advanced RISC Architecture &#822 131 Powerful Instructions – Most Single-clock Cycle Execution &#822 32 x 8 General Purpose Working Registers &#822 Fully Static Operation &#822 Up to 16MIPS Throughput at 16MHz &#822 On-chip 2-cycle Multiplier &#1048698 High Endurance Non-volatile Memory segments &#822 16KBytes of In-System Self-programmable Flash program memory &#822 512Bytes EEPROM &#822 1KByte Internal SRAM &#822 Write/Erase Cycles: 10,000 Flash/100,000 EEPROM &#822 Data retention: 20 years at 85°C/100 years at 25°C(1) &#822 Optional Boot Code Section with Independent Lock Bits &#1048698 In-System Programming by On-chip Boot Program &#1048698 True Read-While-Write Operation &#822 Programming Lock for Software Security
ATmega16A.rar
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<html xmlns="http://www.w3.org/1999/xhtml"> <head> <meta charset="utf-8"> <meta name="generator" content="pdf2htmlEX"> <meta http-equiv="X-UA-Compatible" content="IE=edge,chrome=1"> <link rel="stylesheet" href="https://static.pudn.com/base/css/base.min.css"> <link rel="stylesheet" href="https://static.pudn.com/base/css/fancy.min.css"> <link rel="stylesheet" href="https://static.pudn.com/prod/directory_preview_static/6250b58d74bc5c010574011b/raw.css"> <script src="https://static.pudn.com/base/js/compatibility.min.js"></script> <script src="https://static.pudn.com/base/js/pdf2htmlEX.min.js"></script> <script> try{ pdf2htmlEX.defaultViewer = new pdf2htmlEX.Viewer({}); }catch(e){} </script> <title></title> </head> <body> <div id="sidebar" style="display: none"> <div id="outline"> </div> </div> <div id="pf1" class="pf w0 h0" data-page-no="1"><div class="pc pc1 w0 h0"><img class="bi x0 y0 w1 h1" alt="" src="https://static.pudn.com/prod/directory_preview_static/6250b58d74bc5c010574011b/bg1.jpg"><div class="t m0 x1 h2 y1 ff1 fs0 fc0 sc0 ls0 ws0">Atmel-8154C<span class="_ _0"></span>-8-bit-AVR<span class="_ _0"></span>-ATmega16A_Da<span class="_ _0"></span>tasheet-07/20<span class="_ _0"></span>14</div><div class="t m0 x2 h3 y2 ff2 fs1 fc1 sc0 ls1 ws0">Features</div><div class="t m0 x3 h4 y3 ff3 fs2 fc1 sc0 ls2 ws0">z<span class="_ _1"> </span><span class="ff1 fs3 fc2 ls3">High-perform<span class="_ _2"></span>ance, Low-<span class="_ _2"></span>power Atme<span class="_ _2"></span>l</span></div><div class="t m0 x4 h5 y4 ff1 fs4 fc2 sc0 ls2 ws0"> </div><div class="t m0 x5 h4 y3 ff1 fs3 fc2 sc0 ls4 ws0">AV<span class="_ _3"></span>R</div><div class="t m0 x6 h5 y4 ff1 fs4 fc2 sc0 ls2 ws0"> </div><div class="t m0 x7 h4 y3 ff1 fs3 fc2 sc0 ls5 ws1">8-bit Microcon<span class="_ _0"></span>troller</div><div class="t m0 x3 h4 y5 ff3 fs2 fc1 sc0 ls2 ws0">z<span class="_ _1"> </span><span class="ff1 fs3 fc2 ls6 ws2">Advanced RISC Architecture</span></div><div class="t m0 x8 h6 y6 ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 ls7 ws3">131 Powerful Instructions &#8211; Most Single-clock Cycle Execution</span></div><div class="t m0 x8 h6 y7 ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 ls8">32 x 8 General Purpose Working Registers</span></div><div class="t m0 x8 h6 y8 ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 ls8">Fully S<span class="_ _0"></span>t<span class="_ _0"></span>atic Operation</span></div><div class="t m0 x8 h6 y9 ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 ls9 ws4">Up to 16MIPS Throughput at 16MHz</span></div><div class="t m0 x8 h6 ya ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 lsa ws3">On-chip 2-cycle Multiplier</span></div><div class="t m0 x3 h4 yb ff3 fs2 fc1 sc0 ls2 ws0">z<span class="_ _1"> </span><span class="ff1 fs3 fc2 lsb ws5">High Endurance Non-volatile Memory se<span class="_ _0"></span>gments</span></div><div class="t m0 x8 h6 yc ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 ls8">16KBytes of In-System Self-programmable Flash program memory</span></div><div class="t m0 x8 h6 yd ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 lsa ws6">512Bytes EEPROM</span></div><div class="t m0 x8 h6 ye ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 lsc ws7">1KByte Internal SRAM</span></div><div class="t m0 x8 h6 yf ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 ls9 ws4">Write/Erase Cycles: 10,000 Flash/10<span class="_ _0"></span>0,000 EEPROM</span></div><div class="t m0 x8 h7 y10 ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 lsd ws8">Data retention: 20 years at 85</span><span class="ff5 fc2">&#176;<span class="ff1 ls8">C/100 years at 25</span>&#176;<span class="ff1">C</span></span></div><div class="t m0 x9 h8 y11 ff1 fs6 fc1 sc0 lse ws0">(1)</div><div class="t m0 x8 h6 y12 ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 lsd ws8">Optional Boot Code Section with Independent Lock Bits</span></div><div class="t m0 xa h6 y13 ff3 fs7 fc3 sc0 ls2 ws0">z<span class="_"> </span><span class="ff1 fs5 fc2 ls8">In-System Programming by On-chip Boot Program</span></div><div class="t m0 xa h6 y14 ff3 fs7 fc3 sc0 ls2 ws0">z<span class="_"> </span><span class="ff1 fs5 fc2 lsa ws3">True Read-While-W<span class="_ _0"></span>rite Operation</span></div><div class="t m0 x8 h6 y15 ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 lsa ws6">Programming Lock for Software Security</span></div><div class="t m0 x3 h4 y16 ff3 fs2 fc1 sc0 ls2 ws0">z<span class="_ _1"> </span><span class="ff1 fs3 fc2 lsf ws9">JT<span class="_ _5"></span>AG (IEEE std. 1<span class="_ _5"></span>149.1<span class="ls10 wsa"> Compliant) Interface</span></span></div><div class="t m0 x8 h6 y17 ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 lsd ws8">Boundary-scan Capabilities According to the JT<span class="_ _5"></span>AG S<span class="_ _5"></span>tandard</span></div><div class="t m0 x8 h6 y18 ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 ls8">Extensive On-chip Debug Support</span></div><div class="t m0 x8 h6 y19 ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 lsd ws8">Programming of Flash, EEPROM, Fuses, and Lock Bits through the JT<span class="_ _5"></span>AG </span></div><div class="t m0 xb h6 y1a ff1 fs5 fc2 sc0 ls11 ws0">Interface</div><div class="t m0 x3 h4 y1b ff3 fs2 fc1 sc0 ls2 ws0">z<span class="_ _1"> </span><span class="ff1 fs3 fc2 ls12 wsb">Peripheral Featur<span class="_ _0"></span>es</span></div><div class="t m0 x8 h6 y1c ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 ls8">T<span class="_ _5"></span>wo 8-bit Timer/Counters with Sep<span class="_ _0"></span>arate Prescalers and Compare Modes</span></div><div class="t m0 x8 h6 y1d ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 lsd ws8">One 16-bit T<span class="_ _0"></span>imer/Counter with Sep<span class="_ _0"></span>arate Prescaler<span class="_ _5"></span>, Compare Mode, and </span></div><div class="t m0 xb h6 y1e ff1 fs5 fc2 sc0 ls11 ws7">Capture Mode</div><div class="t m0 x8 h6 y1f ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 lsa ws6">Real T<span class="_ _0"></span>ime Counter with Separate Oscillator</span></div><div class="t m0 x8 h6 y20 ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 lsc ws8">Four PWM Channels</span></div><div class="t m0 x8 h6 y21 ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 lsa ws3">8-channel, 10-bit ADC</span></div><div class="t m0 xa h6 y22 ff3 fs7 fc3 sc0 ls2 ws0">z<span class="_"> </span><span class="ff1 fs5 fc2 lsa ws6">8 Single-ended Channels</span></div><div class="t m0 xa h6 y23 ff3 fs7 fc3 sc0 ls2 ws0">z<span class="_"> </span><span class="ff1 fs5 fc2 lsc ws7">7 Differential Channels in TQFP Package Only</span></div><div class="t m0 xa h6 y24 ff3 fs7 fc3 sc0 ls2 ws0">z<span class="_"> </span><span class="ff1 fs5 fc2 ls8">2 Differential Channels with Programmable Gain at 1x, 10x, or 200x</span></div><div class="t m0 x8 h6 y25 ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 ls8">Byte-oriented T<span class="_ _5"></span>wo-wire Serial Interface</span></div><div class="t m0 x8 h6 y26 ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 ls13 wsc">Programmable Serial USAR<span class="_ _0"></span>T</span></div><div class="t m0 x8 h6 y27 ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 ls8">Master/Slave SPI Serial Interface</span></div><div class="t m0 x8 h6 y28 ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 lsc ws7">Programmable W<span class="_ _0"></span>atchdog T<span class="_ _6"></span>imer with Separate On-chip Oscillator</span></div><div class="t m0 x8 h6 y29 ff4 fs5 fc1 sc0 ls2 ws0">&#61043;<span class="_ _4"> </span><span class="ff1 fc2 ls14 wsd">On-chip Analog Comparator</span></div><div class="t m0 xc h9 y2a ff2 fs8 fc1 sc0 ls15 ws0">A<span class="_ _7"></span>Tmega16A</div><div class="t m0 xd ha y2b ff2 fs9 fc2 sc0 ls16 wse">8-bit Microcontroller <span class="wsf">with 16K Bytes In-System</span></div><div class="t m0 xe ha y2c ff2 fs9 fc2 sc0 ls17 ws10">Programmable Flash</div><div class="t m0 xf h3 y2d ff2 fs1 fc2 sc0 ls18 ws0">DAT<span class="_ _6"></span>ASHEET</div><a class="l" rel='nofollow' onclick='return false;'><div class="d m1"></div></a></div><div class="pi" data-data='{"ctm":[1.613445,0.000000,0.000000,1.613445,0.000000,-41.949580]}'></div></div> </body> </html>
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